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TPIC6595 Series

8-bit shift register with 250mA/ch

Manufacturer: Texas Instruments

Catalog(3 parts)

PartOperating TemperatureOperating TemperatureFunctionPackage / CasePackage / CasePackage / CaseVoltage - SupplyVoltage - SupplyLogic TypeMounting TypeNumber of Bits per ElementSupplier Device PackageNumber of ElementsOutput TypePackage / Case
Texas Instruments
TPIC6595N
Shift Shift Register 1 Element 8 Bit 20-PDIP
125 °C
-40 °C
Serial to Parallel, Serial
20-DIP
0.007619999814778566 m
0.007619999814778566 m
5.5 V
4.5 V
Shift Register
Through Hole
8 ul
20-PDIP
1 ul
Open Drain
Texas Instruments
TPIC6595DW
Shift Shift Register 1 Element 8 Bit 20-SOIC
125 °C
-40 °C
Serial to Parallel, Serial
20-SOIC
5.5 V
4.5 V
Shift Register
Surface Mount
8 ul
20-SOIC
1 ul
Open Drain
0.007493000011891127 m, 0.007499999832361937 m
Texas Instruments
TPIC6595DWG4
Shift Shift Register 1 Element 8 Bit 20-SOIC
125 °C
-40 °C
Serial to Parallel, Serial
20-SOIC
5.5 V
4.5 V
Shift Register
Surface Mount
8 ul
20-SOIC
1 ul
Open Drain
0.007493000011891127 m, 0.007499999832361937 m

Key Features

Low rDS(on): 1.3Ω typicalAvalanche energy: 75mJEight power DMOS transistor outputs of 250mA continuous current1.5A pulsed current per outputOutput clamp voltage at 45VDevices can cascadeLow power consumptionLow rDS(on): 1.3Ω typicalAvalanche energy: 75mJEight power DMOS transistor outputs of 250mA continuous current1.5A pulsed current per outputOutput clamp voltage at 45VDevices can cascadeLow power consumption

Description

AI
The TPIC6595 is a monolithic, high-voltage, high-current power 8-bit shift register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shift register clear (SRCLR) is high. Write data and read data are valid only when RCK is low. When SRCLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) allows for cascading of the data from the shift register to additional devices. Outputs are low-side, open-drain DMOS transistors with output ratings of 45V and 250mA continuous sink current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high, the DMOS-transistor outputs have sink current capability. Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins 1, 10, 11, and 20 are internally connected, and each pin must be externally connected to the power system ground in order to minimize parasitic inductance. A single-point connection between pin 19, logic ground (LGND), and pins 1, 10, 11, and 20, power grounds (PGND), must be externally made in a manner that reduces crosstalk between the logic and load circuits. The TPIC6595 is characterized for operation over the operating case temperature range of −40°C to 125°C. The TPIC6595 is a monolithic, high-voltage, high-current power 8-bit shift register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shift register clear (SRCLR) is high. Write data and read data are valid only when RCK is low. When SRCLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) allows for cascading of the data from the shift register to additional devices. Outputs are low-side, open-drain DMOS transistors with output ratings of 45V and 250mA continuous sink current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high, the DMOS-transistor outputs have sink current capability. Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins 1, 10, 11, and 20 are internally connected, and each pin must be externally connected to the power system ground in order to minimize parasitic inductance. A single-point connection between pin 19, logic ground (LGND), and pins 1, 10, 11, and 20, power grounds (PGND), must be externally made in a manner that reduces crosstalk between the logic and load circuits. The TPIC6595 is characterized for operation over the operating case temperature range of −40°C to 125°C.