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SN74HC595B Series

8-Bit Shift Registers With 3-State Output

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

8-Bit Shift Registers With 3-State Output

PartSupplier Device PackageFunctionNumber of Elements [custom]Package / CaseVoltage - Supply [Min]Voltage - Supply [Max]Operating Temperature [Min]Operating Temperature [Max]Mounting TypeNumber of Bits per ElementLogic TypeOutput Type
Texas Instruments
SN74HC595BRWNR
16-X1QFN (2.5x2.5)
Serial to Parallel
1
16-XFQFN Exposed Pad
2 V
6 V
-55 °C
125 °C
Surface Mount
8
Shift Register
Tri-State

Key Features

8-Bit Serial-In, Parallel-Out Shift RegistersAvailable in Ultra Small Logic QFN package(0.5 mmmax height)Over-Voltage Tolerant on Inputs Independent of VccWide Operating Voltage Range of 2 V to 6 VHigh-Current 3-State Outputs Can Drive Up to 15LSTTL LoadsLow Power Consumption: 80-µA (Maximum) ICCtpd= 13 ns (Typical)±6-mA Output Drive at 5 VLow Input Current: 1 µA (Maximum)Shift Register Has Direct Clear-55oC to 125oC Operating Temperature8-Bit Serial-In, Parallel-Out Shift RegistersAvailable in Ultra Small Logic QFN package(0.5 mmmax height)Over-Voltage Tolerant on Inputs Independent of VccWide Operating Voltage Range of 2 V to 6 VHigh-Current 3-State Outputs Can Drive Up to 15LSTTL LoadsLow Power Consumption: 80-µA (Maximum) ICCtpd= 13 ns (Typical)±6-mA Output Drive at 5 VLow Input Current: 1 µA (Maximum)Shift Register Has Direct Clear-55oC to 125oC Operating Temperature

Description

AI
The SN74HC595B devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the all outputs are in the high-impedance state except QH’. The SN74HC595B devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the all outputs are in the high-impedance state except QH’.