Zenode.ai Logo
Beta
K
S25FL128SAGBHIA00 - S25FL128SAGBHIA00

S25FL128SAGBHIA00

Active
Infineon Technologies

FLASH MEMORY, SERIAL NOR, 128 MBIT, 16M X 8BIT, SPI, BGA, 24 PINS

Deep-Dive with AI

Search across all available documentation for this part.

S25FL128SAGBHIA00 - S25FL128SAGBHIA00

S25FL128SAGBHIA00

Active
Infineon Technologies

FLASH MEMORY, SERIAL NOR, 128 MBIT, 16M X 8BIT, SPI, BGA, 24 PINS

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationS25FL128SAGBHIA00
Clock Frequency133 MHz
Memory FormatFLASH
Memory InterfaceSPI - Quad I/O
Memory Organization16M x 8
Memory Size128 Mb
Memory TypeNon-Volatile
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case24-TBGA
Supplier Device Package24-BGA
TechnologyFLASH - NOR
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyBulk 98$ 3.08
98$ 3.08
Tray 1$ 4.62
1$ 4.62
10$ 4.19
10$ 4.19
25$ 4.10
25$ 4.10
40$ 4.08
40$ 4.08
80$ 3.66
80$ 3.66
338$ 3.65
338$ 3.65
676$ 3.51
676$ 3.51
1014$ 3.34
1014$ 3.34
NewarkEach 1$ 3.70
10$ 3.41
25$ 3.18
50$ 3.10
100$ 3.09
250$ 2.79
500$ 2.78

Description

General part information

S25FL128 Series

S25FL128SAGBHIA00 is a 3.0V SPI flash memory. This device connects to a host system via a serial peripheral interface (SPI). Traditional SPI singlebit serial input and output (single I/O or SIO) is supported as well as optional twobit (Dual I/O or DIO) and fourbit (quad I/O or QIO) serial commands. This multiple-width interface is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for double data rate (DDR) read commands for SIO, DIO, and QIO that transfer address and read data on both edges of the clock. The Eclipse architecture features a Page Programming Buffer that allows up to 128 words (256 bytes) or 256 words (512 bytes) to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. It offers high densities coupled with the flexibility and fast performance required by a variety of embedded applications. They are ideal for code shadowing, XIP, and data storage.

Documents

Technical documentation and resources