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SNJ54LVC74AW

SNJ54LVC74AW

Active
Texas Instruments

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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SNJ54LVC74AW

SNJ54LVC74AW

Active
Texas Instruments

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

Find alt

Description

General part information

SN54LVC74A Series

The SNx4LVC74A devices integrate two positive-edge triggered D-type flip-flops in one convenient device.

The SN54LVC74A is designed for 2.7V to 3.6V VCC operation, and the SN74LVC74A is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC74A devices integrate two positive-edge triggered D-type flip-flops in one convenient device.

Technical Specifications

Parameters and characteristics for this part

SpecificationSNJ54LVC74AW
Clock Frequency100 MHz
Current - Output High24 mA
Current - Output Low24 mA
Current - Quiescent (Iq)10 µA
FunctionSet(Preset) and Reset
Input Capacitance5 pF
Max CL50 pF
Max Propagation Delay6.4 ns
Mounting TypeSurface Mount
Number of Bits per Element1 bits
Number of Elements2
Operating Temperature (Max)125 °C
Operating Temperature (Min)-55 °C
Output TypeComplementary
Package / Case14-CFlatPack
Package Name14-CFP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)2 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

SNJ54LVC74AW | Datasheet
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Live Insertion
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
LOGIC Pocket Data Book (Rev. B)
Texas Instruments Little Logic Application Report
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Selecting the Right Level Translation Solution (Rev. A)
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Input and Output Characteristics of Digital Integrated Circuits
LVC Characterization Information
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Signal Switch Data Book (Rev. A)
Low-Voltage Logic (LVC) Designer's Guide
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
TI IBIS File Creation, Validation, and Distribution Processes
Understanding Advanced Bus-Interface Products Design Guide
How to Select Little Logic (Rev. A)
Power-Up Behavior of Clocked Devices (Rev. B)
Little Logic Guide 2018 (Rev. G)
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Implications of Slow or Floating CMOS Inputs (Rev. E)
SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset datasheet (Rev. W)
Logic Guide (Rev. AB)
Design Summary for WCSP Little Logic (Rev. B)
Standard Linear & Logic for PCs, Servers & Motherboards
CMOS Power Consumption and CPD Calculation (Rev. B)