SN74LVCH16374ADGG
ActiveTexas Instruments
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVCH16374ADGG
ActiveTexas Instruments
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
Description
General part information
74LVCH16374 Series
This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.
This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVCH16374ADGG |
|---|---|
| Clock Frequency | 150 MHz |
| Current - Output High | 24 mA |
| Current - Output Low | 24 mA |
| Current - Quiescent (Iq) | 20 µA |
| Function | Standard |
| Input Capacitance | 5 pF |
| Max CL | 50 pF |
| Max Propagation Delay | 4.5 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 bits |
| Number of Elements | 2 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Output Type | Tri-State, Non-Inverted |
| Package Length | 0.24 in |
| Package Name | 48-TSSOP, 48-TFSOP |
| Package Width | 6.1 mm |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply (Maximum) | 3.6 V |
| Voltage - Supply (Minimum) | 1.65 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
LOGIC Pocket Data Book (Rev. B)
Signal Switch Data Book (Rev. A)
Input and Output Characteristics of Digital Integrated Circuits
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
Power-Up Behavior of Clocked Devices (Rev. B)
Implications of Slow or Floating CMOS Inputs (Rev. E)
Texas Instruments Little Logic Application Report
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Standard Linear & Logic for PCs, Servers & Motherboards
LVC Characterization Information
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Selecting the Right Level Translation Solution (Rev. A)
SN74LVCH16374A 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs datasheet (Rev. B)
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Design Summary for WCSP Little Logic (Rev. B)
TI IBIS File Creation, Validation, and Distribution Processes
Little Logic Guide 2018 (Rev. G)
How to Select Little Logic (Rev. A)
Understanding Advanced Bus-Interface Products Design Guide
An Overview of Bus-Hold Circuit and the Applications (Rev. B)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
CMOS Power Consumption and CPD Calculation (Rev. B)
Low-Voltage Logic (LVC) Designer's Guide
Live Insertion
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
Logic Guide (Rev. AB)
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
SN74LVCH16374ADGG | Datasheet
