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TMS320DM6435ZWTQ5

Active
Texas Instruments

DIGITAL MEDIA PROCESSOR, UP TO 4800 MIPS, 600 MHZ CLOCK RATE, 1 MCASP, 1 MCBSP

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NFBGA (ZWT)

TMS320DM6435ZWTQ5

Active
Texas Instruments

DIGITAL MEDIA PROCESSOR, UP TO 4800 MIPS, 600 MHZ CLOCK RATE, 1 MCASP, 1 MCBSP

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Description

General part information

TMS320DM6435Q Series

The TMS320C64x+™ DSPs (including the TMS320DM6435 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The DM6435 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units–two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

Technical Specifications

Parameters and characteristics for this part

SpecificationTMS320DM6435ZWTQ5
Clock Rate (Frequency)500 MHz
InterfaceUART, McBSP, I2C, McASP, HPI, 10/100 Ethernet MAC
Mounting TypeSurface Mount
Non-Volatile Memory Size64 kB
Non-Volatile Memory TypeROM
On-Chip RAM240 kB
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Package / Case361-LFBGA
Package Length16 mm
Package Name361-NFBGA
Package Width16 mm
TypeFixed Point
Voltage - Core (Option 1)1.05 V
Voltage - Core (Option 2)1.2 V
Voltage - I/O (Option 1)1.8 V
Voltage - I/O (Option 2)3.3 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

TMS320DM643x DMP Universal Asynchronous Receiver/Transmitter (UART) UG (Rev. C)
Understanding the Davinci Resizer (Rev. B)
Understanding the Davinci Preview Engine (Rev. A)
5Vin DM643x Power using Integrated-FET DC/DC Converters and LDO
TMS320DM643x DMP VLYNQ Port User's Guide (Rev. B)
TMS320C64x+ DSP Cache User's Guide (Rev. B)
TMS320C6000 Optimizing Compiler v 6.1 User's Guide (Rev. O)
TMS320C6000 Assembly Language Tools v 6.1 User's Guide (Rev. Q)
TMS320DM643x DMP Multichannel Audio Serial Port (McASP) User's Guide (Rev. D)
How to Use the VPBE and VPFE Driver on the TMS320DM643x Devices (Rev. A)
TMS320DM643x DMP Asynchronous External Memory Interface (EMIF) UG (Rev. B)
How to Use the EDMA3 Driver on a TMS320DM643x Device (Rev. A)
TMS320C64x+ DSP Big-Endian Library Programmer's Reference
TMS320DM643x DMP Pulse-Width Modulator (PWM) User's Guide (Rev. B)
TMS320DM643x DMP General-Purpose Input/Output (GPIO) User's Guide (Rev. B)
Implementing DDR2 PCB Layout on the TMS320DM643x DMSoC (Rev. A)
Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)
Using the TMS320DM643x Bootloader (Rev. E)
TMS320DM643x DMP High-End CAN Controller (HECC) User's Guide (Rev. A)
TMS320DM643x Pin Multiplexing Utility
TMS320C6000 DSP TCP/IP Stack Software (Rev. C)
Plastic Ball Grid Array [PBGA] Application Note (Rev. B)
DaVinci Technology - Digital Video Innovation Product Bulletin (Rev. D)
TMS320DM643x Power Consumption Summary (Rev. C)
TMS320C64x+ DSP Little-Endian Library Programmer's Reference (Rev. B)
5Vin DM643x Power using DC/DC Controllers and LDO
TMS320DM643x DMP DSP Subsystem Reference Guide (Rev. E)
TMS320DM643x DMP Enhanced DMA (EDMA) Controller User's Guide (Rev. A)
TMS320C64x+ DSP Image/Video Processing Library (v2.0) Programmer's Reference (Rev. A)
TMS320DM643x DMP Peripherals Overview Reference Guide (Rev. A)
TMS320C64x+ Image/Video Processing Library Programmer's Reference
TMS320DM643x DMP DDR2 Memory Controller User's Guide (Rev. C)
TMS320C64x+ DSP Megamodule Reference Guide (Rev. K)
Overview of DaVinci™ TMS320DM643x Digital Media Portfolio (Rev. B)
TMS320DM643x DMP Host Port Interface (HPI) User's Guide (Rev. D)
TMS320DM643x DMP 64-Bit Timer User's Guide
TMS320DM6435 Digital Media Processor datasheet (Rev. C)
Migrating from TMS320C64x to TMS320C64x+ (Rev. A)
Migrating from EDMA v2.0 to EDMA v3.0 TMS320C64X DSP (Rev. A)
5Vin DM643x Power using a PMIC (Multi-output DC/DC Converter)
TMS320DM643x DMP Multichannel Buffered Serial Port (McBSP) User's Guide (Rev. C)
TMS320DM643x DMP Inter-Integrated Circuit (I2C) Module User's Guide (Rev. E)
TMS320DM6437/35/33/31 DMP Silicon Errata (Revs. 1.3 1.2 1.1 & 1.0) (Rev. E)
TMS320DM643x DMP EMAC/MDIO User's Guide (Rev. C)
12Vin DM643x Power using Integrated-FET DC/DC Converters and LDO
DaVinci Technology Background and Specifications (Rev. A)
Common Object File Format (COFF)
TMS320C6000 Programmer's Guide (Rev. K)
Thermal Considerations for the DM64xx, DM64x, and C6000 Devices
TMS320DM643x DMP Video Processing Front End (VPFE) User's Guide (Rev. D)
TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. J)
TMS320DM6435ZWTQ5 | Datasheet