SN74LV373ATDWR

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Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUT 20-SOIC -40 TO 125

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DocumentsDatasheet SN74LV373AT datasheet (Rev. B)

SN74LV373ATDWR

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Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUT 20-SOIC -40 TO 125

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DocumentsDatasheet SN74LV373AT datasheet (Rev. B)

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics commom to parts in this series

Specification	SN74LV373ATDWR	74LV373 Series

Circuit	8:8	8:8
Current - Output High, Low [custom]	16 mA	16 mA
Current - Output High, Low [custom]	16 mA	16 mA
Delay Time - Propagation	1 ns	1 ns
Grade	-	Automotive
Independent Circuits	1	1
Logic Type	D-Type Transparent Latch	D-Type Transparent Latch
Mounting Type	Surface Mount	Surface Mount
Operating Temperature [Max]	85 °C	85 °C
Operating Temperature [Min]	-40 °C	-40 °C
Output Type	Tri-State	Tri-State
Package / Case	7.5 mm, 0.295 in	0.173 - 7.5 in
Package / Case	20-SOIC	20-TSSOP, 20-VFBGA, 20-VFQFN Exposed Pad, 20-SOIC, 20-SSOP, 20-TFSOP
Package / Case	-	0.173 - 4.4 mm
Package / Case	-	4.4 mm
Qualification	-	AEC-Q100
Supplier Device Package	20-SOIC	20-TSSOP, 20-BGA MICROSTAR JUNIOR (4x3), 20-VQFN (3.5x4.5), 20-SOIC, 20-SSOP, 20-TVSOP, 20-SO
Voltage - Supply [Max]	5.5 V	5.5 V
Voltage - Supply [Min]	4.5 V	2 - 4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

DigiKey	Bulk	1111	$ 0.27
	Digi-Reel®, Cut Tape (CT), Tape & Reel (TR)	1	$ 0.60
		10	$ 0.42
		25	$ 0.38
		100	$ 0.33
		250	$ 0.31
		500	$ 0.29
		1000	$ 0.28
		2000	$ 0.27
		4000	$ 0.26
		6000	$ 0.26
		10000	$ 0.26
		14000	$ 0.25
		20000	$ 0.25
Digikey	Cut Tape (CT)	1	$ 0.71
		10	$ 0.62
		25	$ 0.59
		100	$ 0.48
		250	$ 0.44
		500	$ 0.38
		1000	$ 0.30
	Digi-Reel®	1	$ 0.71
		10	$ 0.62
		25	$ 0.59
		100	$ 0.48
		250	$ 0.44
		500	$ 0.38
		1000	$ 0.30
	Tape & Reel (TR)	2000	$ 0.23
Mouser Electronics	N/A	1	$ 0.60
		10	$ 0.38
		100	$ 0.31
		500	$ 0.29
		1000	$ 0.28
		2000	$ 0.27
		4000	$ 0.26
		10000	$ 0.25
Rochester Electronics	N/A	1	$ 0.26
		25	$ 0.25
		100	$ 0.24
		500	$ 0.23
		1000	$ 0.22
Texas Instruments	LARGE T&R	1	$ 0.59
		100	$ 0.40
		250	$ 0.31
		1000	$ 0.20
Verical	N/A	1360	$ 0.28
		1360	$ 0.28
		1360	$ 0.28
		1360	$ 0.28

74LV373 Series

Automotive Catalog Octal Transparent D-Type Latches With 3-State Outputs

Part	Delay Time - Propagation	Grade	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Operating Temperature [Min]	Operating Temperature [Max]	Output Type	Qualification	Voltage - Supply [Min]	Voltage - Supply [Max]	Supplier Device Package	Circuit	Logic Type	Package / Case	Package / Case	Package / Case	Independent Circuits	Package / Case
Texas Instruments SN74LV373AIPWRQ1 The SN74LV373A-Q1 device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. The SN74LV373A-Q1 device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.	1 ns	Automotive	16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State	AEC-Q100	2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373APWRG4 The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373AGQNR D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-BGA MICROSTAR JUNIOR (4x3)	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-BGA MICROSTAR JUNIOR (4x3)	8:8	D-Type Transparent Latch			20-VFBGA	1
Texas Instruments SN74LV373ARGYR The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-VQFN (3.5x4.5)	8:8	D-Type Transparent Latch			20-VFQFN Exposed Pad	1
Texas Instruments SN74LV373APWR The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ADWRG4 D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-SOIC	8:8	D-Type Transparent Latch	0.295 in, 7.5 mm		20-SOIC	1
Texas Instruments SN74LV373APWRE4 D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-TSSOP	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ADBR The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-SSOP	8:8	D-Type Transparent Latch	0.209 in, 5.3 mm		20-SSOP	1
Texas Instruments SN74LV373ATPWR The SN74LV373AT is an octal transparent D-type latch. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OEdoes not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74LV373AT is an octal transparent D-type latch. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OEdoes not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ATPWT D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-TSSOP	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ADWR The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-SOIC	8:8	D-Type Transparent Latch	0.295 in, 7.5 mm		20-SOIC	1
Texas Instruments SN74LV373ADGVR The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-TVSOP	8:8	D-Type Transparent Latch		0.173 in	20-TFSOP	1	4.4 mm
Texas Instruments SN74LV373APWG4 D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-TSSOP	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ATDWG4 D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-SOIC	8:8	D-Type Transparent Latch	0.295 in, 7.5 mm		20-SOIC	1
Texas Instruments SN74LV373ADW The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-SOIC	8:8	D-Type Transparent Latch	0.295 in, 7.5 mm		20-SOIC	1
Texas Instruments SN74LV373ATDW D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-SOIC	8:8	D-Type Transparent Latch	0.295 in, 7.5 mm		20-SOIC	1
Texas Instruments SN74LV373APW The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ATDBR D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SSOP	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-SSOP	8:8	D-Type Transparent Latch	0.209 in, 5.3 mm		20-SSOP	1
Texas Instruments SN74LV373ATNS D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-SO	8:8	D-Type Transparent Latch	0.209 in, 5.3 mm		20-SOIC	1
Texas Instruments SN74LV373ATPW D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-TSSOP	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373APWT The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ANSR The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. The SN74LV373A device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-SO	8:8	D-Type Transparent Latch	0.209 in, 5.3 mm		20-SOIC	1
Texas Instruments SN74LV373ATDWR The SN74LV373AT is an octal transparent D-type latch. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OEdoes not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74LV373AT is an octal transparent D-type latch. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OEdoes not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-SOIC	8:8	D-Type Transparent Latch	0.295 in, 7.5 mm		20-SOIC	1
Texas Instruments SN74LV373AZQNR D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-BGA MICROSTAR JUNIOR (4x3)	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		2 V	5.5 V	20-BGA MICROSTAR JUNIOR (4x3)	8:8	D-Type Transparent Latch			20-VFBGA	1
Texas Instruments SN74LV373AIPWRG4Q1 The SN74LV373A-Q1 device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. The SN74LV373A-Q1 device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.	1 ns	Automotive	16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State	AEC-Q100	2 V	5.5 V	20-TSSOP	8:8	D-Type Transparent Latch	0.173 in	4.4 mm	20-TSSOP	1
Texas Instruments SN74LV373ATRGYR D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-VQFN (3.5x4.5)	1 ns		16 mA	16 mA	Surface Mount	-40 °C	85 °C	Tri-State		4.5 V	5.5 V	20-VQFN (3.5x4.5)	8:8	D-Type Transparent Latch			20-VFQFN Exposed Pad	1

Description

General part information

74LV373 Series

The SN74LV373A-Q1 device is an octal transparent D-type latch designed for 2 V to 5.5 V V CC operation. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.