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TLV5619IDWG4 - 20-SOIC

TLV5619IDWG4

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Texas Instruments

IC DAC 12BIT V-OUT 20SOIC

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TLV5619IDWG4 - 20-SOIC

TLV5619IDWG4

Active
Texas Instruments

IC DAC 12BIT V-OUT 20SOIC

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Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationTLV5619IDWG4TLV5619 Series
ArchitectureString DACString DAC
Data InterfaceParallelParallel
Differential OutputFalseFalse
INL/DNL (LSB) [Max]1.5 LSB1.5 LSB
INL/DNL (LSB) [Min]-1.5 LSB-1.5 LSB
Mounting TypeSurface MountSurface Mount
Number of Bits1212
Operating Temperature [Max]85 °C70 - 125 °C
Operating Temperature [Min]-40 °C-40 - 0 °C
Output TypeVoltage - BufferedVoltage - Buffered
Package / Case7.5 mm, 0.295 in0.173 - 7.5 mm
Package / Case20-SOIC20-SOIC, 20-TSSOP
Package / Case-4.4 mm
Reference TypeExternalExternal
Settling Time3 µs3 µs
Supplier Device Package20-SOIC20-SOIC, 20-TSSOP
Voltage - Supply, Analog5 V5 V
Voltage - Supply, Analog [Max]3.3 V3.3 V
Voltage - Supply, Analog [Min]2.7 V2.7 V
Voltage - Supply, Digital5 V5 V
Voltage - Supply, Digital [Max]3.3 V3.3 V
Voltage - Supply, Digital [Min]2.7 V2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

TLV5619 Series

12-BIT, SINGLE CHANNEL DAC, PARALLEL, VOLTAGE OUT, LOW POWER, ASYNCHRONOUS UPDATE

PartVoltage - Supply, Analog [Max]Voltage - Supply, AnalogVoltage - Supply, Analog [Min]Output TypeVoltage - Supply, DigitalVoltage - Supply, Digital [Min]Voltage - Supply, Digital [Max]Number of BitsSettling TimeData InterfaceDifferential OutputArchitectureReference TypeSupplier Device PackageINL/DNL (LSB) [Min]INL/DNL (LSB) [Max]Operating Temperature [Min]Operating Temperature [Max]Mounting TypePackage / CasePackage / CasePackage / Case
Texas Instruments
TLV5619IDW
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-SOIC
-1.5 LSB
1.5 LSB
-40 °C
85 °C
Surface Mount
0.295 in, 7.5 mm
20-SOIC
Texas Instruments
TLV5619CPWR
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-TSSOP
-1.5 LSB
1.5 LSB
0 °C
70 ░C
Surface Mount
0.173 in
20-TSSOP
4.4 mm
Texas Instruments
TLV5619IDWR
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-SOIC
-1.5 LSB
1.5 LSB
-40 °C
85 °C
Surface Mount
0.295 in, 7.5 mm
20-SOIC
Texas Instruments
TLV5619IPW
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-TSSOP
-1.5 LSB
1.5 LSB
-40 °C
85 °C
Surface Mount
0.173 in
20-TSSOP
4.4 mm
Texas Instruments
TLV5619CDW
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-SOIC
-1.5 LSB
1.5 LSB
0 °C
70 ░C
Surface Mount
0.295 in, 7.5 mm
20-SOIC
Texas Instruments
TLV5619CPW
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-TSSOP
-1.5 LSB
1.5 LSB
0 °C
70 ░C
Surface Mount
0.173 in
20-TSSOP
4.4 mm
Texas Instruments
TLV5619QDWG4
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-SOIC
-1.5 LSB
1.5 LSB
-40 °C
125 °C
Surface Mount
0.295 in, 7.5 mm
20-SOIC
Texas Instruments
TLV5619IPWR
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-TSSOP
-1.5 LSB
1.5 LSB
-40 °C
85 °C
Surface Mount
0.173 in
20-TSSOP
4.4 mm
Texas Instruments
TLV5619CDWR
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-SOIC
-1.5 LSB
1.5 LSB
0 °C
70 ░C
Surface Mount
0.295 in, 7.5 mm
20-SOIC
Texas Instruments
TLV5619QDWREP
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-SOIC
-1.5 LSB
1.5 LSB
-40 °C
125 °C
Surface Mount
0.295 in, 7.5 mm
20-SOIC
Texas Instruments
TLV5619IPW
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode. The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-TSSOP
-1.5 LSB
1.5 LSB
-40 °C
85 °C
Surface Mount
0.173 in
20-TSSOP
4.4 mm
Texas Instruments
TLV5619IDWG4
12 Bit Digital to Analog Converter 1 20-SOIC
3.3 V
5 V
2.7 V
Voltage - Buffered
5 V
2.7 V
3.3 V
12
3 µs
Parallel
String DAC
External
20-SOIC
-1.5 LSB
1.5 LSB
-40 °C
85 °C
Surface Mount
0.295 in, 7.5 mm
20-SOIC

Description

General part information

TLV5619 Series

12 Bit Digital to Analog Converter 1 20-SOIC

Documents

Technical documentation and resources