Buck Regulator Positive Output Step-Down DC-DC Controller IC 8-SOIC

The TPPM0115 is a synchronous buck controller capable of driving two external power FETs 180° out of phase. The device requires a minimum of external standard filter components and switching FETs to regulate the desired output voltage. This is achieved with an internal switching frequency of 200 kHz (typical). The TPPM0115 switch mode controller and associated circuitry provide efficient voltage regulation of greater than 85%. The output voltage is set by two external resistors. During power up, when the output voltage reaches 90% of the desired value, the power good (PWRGD) output is transitioned high after a short delay of 1 ms to 5 ms. During power down, when the output voltage falls below 90% of the set value, the PWRGD output is pulled low without any delay. In the event the set output is in an over-voltage condition due to a system fault, the drive to the lower FET turns on to correct the fault. There is a dead time between switching one FET ON while the other FET is switching OFF to prevent cross conduction. The TPPM0115 is capable of driving high static load currents with minimal ripple on the output (<2%). The phase sense input is used to sense the flow of current through the inductor during flyback to minimize ripple on the output. To optimize output filter capacitance, the voltage mode control is based on a fixed ON time during the start of the cycle and hysteretic control during load transients. This allows the device to respond and maintain the set regulation voltage. The TPPM0115 is a synchronous buck controller capable of driving two external power FETs 180° out of phase. The device requires a minimum of external standard filter components and switching FETs to regulate the desired output voltage. This is achieved with an internal switching frequency of 200 kHz (typical). The TPPM0115 switch mode controller and associated circuitry provide efficient voltage regulation of greater than 85%. The output voltage is set by two external resistors. During power up, when the output voltage reaches 90% of the desired value, the power good (PWRGD) output is transitioned high after a short delay of 1 ms to 5 ms. During power down, when the output voltage falls below 90% of the set value, the PWRGD output is pulled low without any delay. In the event the set output is in an over-voltage condition due to a system fault, the drive to the lower FET turns on to correct the fault. There is a dead time between switching one FET ON while the other FET is switching OFF to prevent cross conduction. The TPPM0115 is capable of driving high static load currents with minimal ripple on the output (<2%). The phase sense input is used to sense the flow of current through the inductor during flyback to minimize ripple on the output. To optimize output filter capacitance, the voltage mode control is based on a fixed ON time during the start of the cycle and hysteretic control during load transients. This allows the device to respond and maintain the set regulation voltage.

The TPPM0115 is a synchronous buck controller capable of driving two external power FETs 180° out of phase. The device requires a minimum of external standard filter components and switching FETs to regulate the desired output voltage. This is achieved with an internal switching frequency of 200 kHz (typical). The TPPM0115 switch mode controller and associated circuitry provide efficient voltage regulation of greater than 85%. The output voltage is set by two external resistors. During power up, when the output voltage reaches 90% of the desired value, the power good (PWRGD) output is transitioned high after a short delay of 1 ms to 5 ms. During power down, when the output voltage falls below 90% of the set value, the PWRGD output is pulled low without any delay. In the event the set output is in an over-voltage condition due to a system fault, the drive to the lower FET turns on to correct the fault. There is a dead time between switching one FET ON while the other FET is switching OFF to prevent cross conduction. The TPPM0115 is capable of driving high static load currents with minimal ripple on the output (<2%). The phase sense input is used to sense the flow of current through the inductor during flyback to minimize ripple on the output. To optimize output filter capacitance, the voltage mode control is based on a fixed ON time during the start of the cycle and hysteretic control during load transients. This allows the device to respond and maintain the set regulation voltage. The TPPM0115 is a synchronous buck controller capable of driving two external power FETs 180° out of phase. The device requires a minimum of external standard filter components and switching FETs to regulate the desired output voltage. This is achieved with an internal switching frequency of 200 kHz (typical). The TPPM0115 switch mode controller and associated circuitry provide efficient voltage regulation of greater than 85%. The output voltage is set by two external resistors. During power up, when the output voltage reaches 90% of the desired value, the power good (PWRGD) output is transitioned high after a short delay of 1 ms to 5 ms. During power down, when the output voltage falls below 90% of the set value, the PWRGD output is pulled low without any delay. In the event the set output is in an over-voltage condition due to a system fault, the drive to the lower FET turns on to correct the fault. There is a dead time between switching one FET ON while the other FET is switching OFF to prevent cross conduction. The TPPM0115 is capable of driving high static load currents with minimal ripple on the output (<2%). The phase sense input is used to sense the flow of current through the inductor during flyback to minimize ripple on the output. To optimize output filter capacitance, the voltage mode control is based on a fixed ON time during the start of the cycle and hysteretic control during load transients. This allows the device to respond and maintain the set regulation voltage.