
ADC32RF80IRRHR
ActiveDUAL-CHANNEL, 14-BIT, 3-GSPS, DUAL DDC/CHANNEL, RF-SAMPLING WIDEBAND RECEIVER AND FEEDBACK IC
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ADC32RF80IRRHR
ActiveDUAL-CHANNEL, 14-BIT, 3-GSPS, DUAL DDC/CHANNEL, RF-SAMPLING WIDEBAND RECEIVER AND FEEDBACK IC
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Technical Specifications
Parameters and characteristics commom to parts in this series
Specification | ADC32RF80IRRHR | ADC32RF80 Series |
---|---|---|
Architecture | Pipelined | Pipelined |
Configuration | S/H-ADC | S/H-ADC, ADC |
Data Interface | JESD204B | JESD204B |
Input Type | Differential | Differential |
Mounting Type | Surface Mount | Surface Mount |
Number of A/D Converters | 8 | 2 - 8 |
Number of Bits | 14 | 14 |
Number of Inputs | 2 | 2 |
Operating Temperature [Max] | 85 °C | 85 °C |
Operating Temperature [Min] | -40 °C | -40 °C |
Package / Case | 72-VFQFN Exposed Pad | 72-VFQFN Exposed Pad |
Ratio - S/H:ADC | 2:8 | 2:8, 0:1 |
Reference Type | External | External |
Sampling Rate (Per Second) | 3 G | 3 G |
Supplier Device Package | 72-VQFN (10x10) | 72-VQFN (10x10) |
Voltage - Supply, Analog [Max] | 2 V, 1.25 V | 1.25 - 2 V |
Voltage - Supply, Analog [Min] | 1.1 V, 1.8 V | 1.1 - 1.8 V |
Voltage - Supply, Digital [Max] | 1.2 V | 1.2 V |
Voltage - Supply, Digital [Min] | 1.1 V | 1.1 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
ADC32RF80 Series
Dual-channel, 14-bit, 3-GSPS, dual DDC/channel, RF-sampling wideband receiver and feedback IC
Part | Operating Temperature [Min] | Operating Temperature [Max] | Number of A/D Converters | Voltage - Supply, Analog [Max] | Voltage - Supply, Analog [Min] | Reference Type | Package / Case | Mounting Type | Ratio - S/H:ADC | Architecture | Input Type | Sampling Rate (Per Second) | Data Interface | Number of Bits | Number of Inputs | Voltage - Supply, Digital [Min] | Voltage - Supply, Digital [Max] | Supplier Device Package | Configuration |
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Texas Instruments ADC32RF80IRRHTThe ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).
The ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C). | -40 °C | 85 °C | 8 | 1.25 V, 2 V | 1.1 V, 1.8 V | External | 72-VFQFN Exposed Pad | Surface Mount | 2:8 | Pipelined | Differential | 3 G | JESD204B | 14 | 2 | 1.1 V | 1.2 V | 72-VQFN (10x10) | S/H-ADC |
Texas Instruments ADC32RF80IRRHRThe ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).
The ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C). | -40 °C | 85 °C | 8 | 1.25 V, 2 V | 1.1 V, 1.8 V | External | 72-VFQFN Exposed Pad | Surface Mount | 2:8 | Pipelined | Differential | 3 G | JESD204B | 14 | 2 | 1.1 V | 1.2 V | 72-VQFN (10x10) | S/H-ADC |
Texas Instruments ADC32RF80IRMPRThe ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).
The ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C). | -40 °C | 85 °C | 2 | 2 V | 1.1 V | External | 72-VFQFN Exposed Pad | Surface Mount | 0:1 | Differential | 3 G | JESD204B | 14 | 2 | 1.1 V | 1.2 V | 72-VQFN (10x10) | ADC |
Description
General part information
ADC32RF80 Series
The ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).
Documents
Technical documentation and resources