The CSD95430RRBNexFET™ power stage is a highly optimized design for use in a high-power, high-density synchronous buck converter. This product integrates the driver IC and power MOSFETs to complete the power stage switching function. This combination produces high-current, high-efficiency, and high-speed switching capability in a small 5-mm × 6-mm outline package. It also integrates the accurate current sensing and temperature sensing functionality to simplify system design and improve accuracy. In addition, the PCB footprint has been optimized to help reduce design time and simplify the completion of the overall system design. This power stage features an active current balance feature which allows multiple power stages to be paralleled off a single PWM input. This enables phase multiplication for very high current applications without the need for a similarly high phase count controller. The active current balance ensures that the multiplied phases share current evenly so no significant derating of current capability is needed when paralleling phases.

The CSD95430RRBNexFET™ power stage is a highly optimized design for use in a high-power, high-density synchronous buck converter. This product integrates the driver IC and power MOSFETs to complete the power stage switching function. This combination produces high-current, high-efficiency, and high-speed switching capability in a small 5-mm × 6-mm outline package. It also integrates the accurate current sensing and temperature sensing functionality to simplify system design and improve accuracy. In addition, the PCB footprint has been optimized to help reduce design time and simplify the completion of the overall system design. This power stage features an active current balance feature which allows multiple power stages to be paralleled off a single PWM input. This enables phase multiplication for very high current applications without the need for a similarly high phase count controller. The active current balance ensures that the multiplied phases share current evenly so no significant derating of current capability is needed when paralleling phases.