SN74LVC2G86DCUT
ActiveTexas Instruments
2-CH, 2-INPUT, 1.65-V TO 5.5-V XOR (EXCLUSIVE OR) GATES
SN74LVC2G86DCUT
ActiveTexas Instruments
2-CH, 2-INPUT, 1.65-V TO 5.5-V XOR (EXCLUSIVE OR) GATES
Description
General part information
74LVC2G86 Series
This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCCoperation.
The SN74LVC2G86 performs the Boolean function Y = A ⊕ B or Y =AB + ABin positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVC2G86DCUT |
|---|---|
| Current - Output High | 32 mA |
| Current - Output Low | 32 mA |
| Current - Quiescent (Max) | 10 µA |
| Input Logic Level - High (Max) | 3.85 V |
| Input Logic Level - High (Min) | 1.07 V |
| Input Logic Level - Low (Max) | 1.65 V |
| Input Logic Level - Low (Min) | 0.58 V |
| Logic Type | XOR (Exclusive OR) |
| Max CL | 50 pF |
| Max Propagation Delay | 3.6 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 2 |
| Number of Inputs | 2 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package Length | 0.091 in |
| Package Name | 8-VSSOP, 8-VFSOP |
| Package Width | 2.3 mm |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Sign in to see pricing
Create a free account to access distributor pricing data.
CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
Little Logic Guide 2018 (Rev. G)
Signal Switch Data Book (Rev. A)
Texas Instruments Little Logic Application Report
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Standard Linear & Logic for PCs, Servers & Motherboards
Selecting the Right Level Translation Solution (Rev. A)
Low-Voltage Logic (LVC) Designer's Guide
TI IBIS File Creation, Validation, and Distribution Processes
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Design Summary for WCSP Little Logic (Rev. B)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Live Insertion
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
How to Select Little Logic (Rev. A)
Dual 2-Input Exclusive-OR Gate, SN74LVC2G86 datasheet (Rev. I)
CMOS Power Consumption and CPD Calculation (Rev. B)
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
Input and Output Characteristics of Digital Integrated Circuits
LVC Characterization Information
Understanding Advanced Bus-Interface Products Design Guide
Logic Guide (Rev. AB)
LOGIC Pocket Data Book (Rev. B)
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
Implications of Slow or Floating CMOS Inputs (Rev. E)
