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Description

General part information

74LS374 Series

These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pullup components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the ’LS373 and ’S373 are transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q outputs follow the data (D) inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up.

The eight flip-flops of the ’LS374 and ’S374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic states that were set up at the D inputs.

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LS374NG4
Clock Frequency50 MHz
Current - Output High2.6 mA
Current - Output Low24 mA
Current - Quiescent (Iq)40 mA
FunctionStandard
Max CL45 pF
Max Propagation Delay28 ns
Mounting TypeThrough Hole
Number of Bits per Element8 bits
Number of Elements1
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
Output TypeTri-State, Non-Inverted
Package Length0.3 in
Package Name20-DIP, 20-PDIP
Package Width7.62 mm
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply (Maximum)5.25 V
Voltage - Supply (Minimum)4.75 V

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