ADS1174 - 16 Bit 52k Samples per Second Analog to Digital Converter (ADC) Evaluation Board

ADS1174 - 16 Bit 52k Samples per Second Analog to Digital Converter (ADC) Evaluation Board

The ADS1174 (quad) and ADS1178 (octal) are multiple delta-sigma (ΔΣ) analog-to-digital converters (ADCs) with data rates up to 52k samples-per-second (SPS), which allow synchronous sampling of four and eight channels. These devices use identical packages, and are also compatible with the high-performance 24-bit ADS1274 and ADS1278, permitting drop-in upgrades. The delta-sigma architecture offers near ideal 16-bit ac performance (97dB SNR, -105dB THD, 1LSB linearity) combined with 0.005dB passband ripple and linear phase response. The high-order, chopper-stabilized modulator achieves very low drift (2µV/°C offset, 2ppm/°C gain) and low noise (1LSBPP). The on-chip finite impulse response (FIR) filter provides a usable signal bandwidth up to 90% of the Nyquist rate with 100dB of stop band attenuation while suppressing modulator and signal out-of-band noise. Two operating modes allow for optimization of speed and power: High-speed mode (31mW/Ch at 52kSPS), and Low-power mode (7mW/Ch at 10kSPS). ASYNCinput control pin allows the device conversions to be started and synchronized to an external event. SPI and Frame-Sync serial interfaces are supported. The device is fully specified over the extended industrial range (40°C to +105°C) and is available in an HTQFP-64 PowerPAD package. The ADS1174 (quad) and ADS1178 (octal) are multiple delta-sigma (ΔΣ) analog-to-digital converters (ADCs) with data rates up to 52k samples-per-second (SPS), which allow synchronous sampling of four and eight channels. These devices use identical packages, and are also compatible with the high-performance 24-bit ADS1274 and ADS1278, permitting drop-in upgrades. The delta-sigma architecture offers near ideal 16-bit ac performance (97dB SNR, -105dB THD, 1LSB linearity) combined with 0.005dB passband ripple and linear phase response. The high-order, chopper-stabilized modulator achieves very low drift (2µV/°C offset, 2ppm/°C gain) and low noise (1LSBPP). The on-chip finite impulse response (FIR) filter provides a usable signal bandwidth up to 90% of the Nyquist rate with 100dB of stop band attenuation while suppressing modulator and signal out-of-band noise. Two operating modes allow for optimization of speed and power: High-speed mode (31mW/Ch at 52kSPS), and Low-power mode (7mW/Ch at 10kSPS). ASYNCinput control pin allows the device conversions to be started and synchronized to an external event. SPI and Frame-Sync serial interfaces are supported. The device is fully specified over the extended industrial range (40°C to +105°C) and is available in an HTQFP-64 PowerPAD package.