
LMK61E2-100M00SIAR
ActiveSTANDARD CLOCK OSCILLATORS 100-MHZ +/-50 PPM LVPECL ULTRA-LOW JIT A 595-LMK61E2100M0SIAT

LMK61E2-100M00SIAR
ActiveSTANDARD CLOCK OSCILLATORS 100-MHZ +/-50 PPM LVPECL ULTRA-LOW JIT A 595-LMK61E2100M0SIAT
Description
General part information
LMK61E2 Series
The LMK61E2 device is an ultra-low jitter PLLatinum programmable oscillator with a fractional-N frequency synthesizer with integrated VCO that generates commonly used reference clocks. The outputs can be configured as LVPECL, LVDS, or HCSL.
The device features self start-up from on-chip EEPROM that is factory programmed to generate 156.25-MHz LVPECL output. The device registers and EEPROM settings are fully programmable in-system through I2C serial interface. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3-V ± 5% supply.
The device provides fine and coarse frequency margining options through I2C serial interface to support system design verification tests (DVT), such as standard compliance and system timing margin testing.
Technical Specifications
Parameters and characteristics for this part
| Specification | LMK61E2-100M00SIAR |
|---|---|
| Base Resonator | Silicon |
| Current - Supply (Disable) (Max) | 136 mA |
| Current - Supply (Max) | 208 mA |
| Frequency | 100 MHz |
| Frequency Stability | 50 ppm |
| Function | Enable, Disable |
| Height - Seated (Max) | 0.045 in |
| Mounting Type | Surface Mount |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Output | LVPECL |
| Package / Case | 6-SMD Module |
| Package Length | 7 mm |
| Package Name | 6-QFM |
| Package Width | 5 mm |
| Size / Dimension Length | 0.276 in |
| Size / Dimension Width | 0.197 in |
| Type | XO (Standard) |
| Voltage - Supply | 3.3 V |
Pricing
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CAD
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