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FCBGA (GJC)

TMSC6701GJC16719V

Active
Texas Instruments

DIGITAL SIGNAL PROCESSORS & CONTROLLERS - DSP, DSC FIXED-POINT DSPS TMS 320 PLATFORM

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FCBGA (GJC)

TMSC6701GJC16719V

Active
Texas Instruments

DIGITAL SIGNAL PROCESSORS & CONTROLLERS - DSP, DSC FIXED-POINT DSPS TMS 320 PLATFORM

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Description

General part information

TMS320C6701 Series

The TMS320C67x DSPs are the floating-point DSP family in the TMS320C6000™ DSP platform. The TMS320C6701 (C6701) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a clock rate of 167 MHz, the C6701 offers cost-effective solutions to high-performance DSP programming challenges. The C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6701 can produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

Technical Specifications

Parameters and characteristics for this part

SpecificationTMSC6701GJC16719V
Clock Rate (Frequency)167 MHz
InterfaceMcBSP, Host Interface
Mounting TypeSurface Mount
Non-Volatile Memory TypeExternal
On-Chip RAM128 kB
Operating Temperature (Max)90 °C
Operating Temperature (Min)0 °C
Package / Case352-BBGA, FCBGA
Package Length35 mm
Package Name352-FCBGA
Package Width35 mm
TypeFloating Point
Voltage - Core1.9 V
Voltage - I/O3.3 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D)
TMS320C6000 C Compiler: C Implementation of Intrinsics
TMS320C6000 DSP Interrupt Selector Reference Guide (Rev. A)
TMS320C6000 Board Design: Considerations for Debug (Rev. C)
TMS320C6000 McBSP as a TDM Highway (Rev. A)
TMS320C6000 Host Port to MC68360 Interface (Rev. A)
TMS320C620x/C670x DSP Program & Data Memory Controller/DMA Controller Ref.Guide (Rev. A)
TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C)
How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A)
TMS320C6000 DSP Designing for JTAG Emulation Reference Guide
TMS320C6701 Silicon Errata (Rev. A)
TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A)
Circular Buffering on TMS320C6000 (Rev. A)
TMS320C6000 Board Design for JTAG (Rev. C)
TMS320C6000 McBSP: Interface to SPI ROM (Rev. C)
TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. G)
TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B)
Using IBIS Models for Timing Analysis (Rev. A)
TMS320C6000 System Clock Circuit Example (Rev. A)
Introduction to TMS320C6000 DSP Optimization
TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A)
Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A)
TMS320C6000 McBSP: IOM-2 Interface (Rev. A)
TMS320C6000 McBSP: I2S Interface
TMS320C6000 EMIF to External Flash Memory (Rev. A)
How to Begin Development Today w/ High Performance Floating Point TMS320C67x DSP
TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C)
TMS320C620x/C670x DSP Boot Modes and Configuration Reference Guide
TMS320C620x/TMS3206701 DMA and CPU: Data Access Performance (Rev. A)
Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A)
TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)
TMS320C6000 DSP Host-Post Interface (HPI) Reference Guide (Rev. C)
Using a TMS320C6000 McBSP for Data Packing (Rev. A)
TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A)
Thermal Considerations for the DM64xx, DM64x, and C6000 Devices
TMS320C6000 Chip Support Library API Reference Guide (Rev. J)
TMS320C6000 DMA Example Applications (Rev. A)
TMS320C6701 Floating-Point DSP datasheet (Rev. F)
TMS320C6201/6701 Evaluation Module User's Guide (Rev. F)
TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A)
TMS320C67x/C67x+ DSP CPU and Instruction Set Reference Guide (Rev. A)
TMS320C6000 u-Law and a-Law Companding with Software or the McBSP
TMS320C6000 Host Port to MPC860 Interface (Rev. A)
TMS320C6000 Memory Test (Rev. A)
TMS320C62x/C67x Power Consumption Summary (Rev. C)
TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. Q)
TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E)
TMS320C6000 McBSP Initialization (Rev. C)
TMS320C6201/6701 EVM: TMS320C6000 McBSP to Multimedia Audio Codec (Rev. A)
TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B)