SN74HCS595DYYR
Active8-BIT SHIFT REGISTER WITH SCHMITT-TRIGGER INPUTS AND 3-STATE OUTPUT REGISTERS
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SN74HCS595DYYR
Active8-BIT SHIFT REGISTER WITH SCHMITT-TRIGGER INPUTS AND 3-STATE OUTPUT REGISTERS
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Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | SN74HCS595DYYR | SN74HCS595 Series |
|---|---|---|
| Function | Serial to Parallel | Serial to Parallel |
| Logic Type | Shift Register | Shift Register |
| Mounting Type | Surface Mount | Surface Mount |
| Number of Bits per Element | 8 | 8 |
| Number of Elements [custom] | 1 | 1 |
| Operating Temperature [Max] | 125 °C | 125 °C |
| Operating Temperature [Min] | -40 °C | -40 °C |
| Output Type | Tri-State | Tri-State |
| Package / Case | - | 16-SOIC, 16-TSSOP, 16-WFQFN Exposed Pad |
| Package / Case | - | 0.154 - 3.9 mm Width |
| Package / Case | - | 0.173 " |
| Package / Case | - | 4.4 mm |
| Supplier Device Package | 16-SOT-23-THIN | 16-SOIC, 16-TSSOP, 16-SOT-23-THIN, 16-WQFN |
| Supplier Device Package | - | 2.5 |
| Supplier Device Package | - | 3.5 |
| Voltage - Supply [Max] | 6 V | 6 V |
| Voltage - Supply [Min] | 2 V | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.23 | |
| 10 | $ 0.15 | |||
| 25 | $ 0.14 | |||
| 100 | $ 0.12 | |||
| 250 | $ 0.11 | |||
| 500 | $ 0.10 | |||
| 1000 | $ 0.10 | |||
| Digi-Reel® | 1 | $ 0.23 | ||
| 10 | $ 0.15 | |||
| 25 | $ 0.14 | |||
| 100 | $ 0.12 | |||
| 250 | $ 0.11 | |||
| 500 | $ 0.10 | |||
| 1000 | $ 0.10 | |||
| Tape & Reel (TR) | 3000 | $ 0.09 | ||
| 6000 | $ 0.09 | |||
| 9000 | $ 0.09 | |||
| 15000 | $ 0.08 | |||
| 21000 | $ 0.08 | |||
| 30000 | $ 0.08 | |||
| 75000 | $ 0.08 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.10 | |
| 100 | $ 0.06 | |||
| 250 | $ 0.05 | |||
| 1000 | $ 0.03 | |||
SN74HCS595 Series
8-bit shift register with Schmitt-trigger inputs and 3-state output registers
| Part | Logic Type | Mounting Type | Package / Case | Package / Case | Output Type | Function | Number of Elements [custom] | Supplier Device Package | Operating Temperature [Min] | Operating Temperature [Max] | Voltage - Supply [Min] | Voltage - Supply [Max] | Number of Bits per Element | Package / Case [x] | Package / Case [x] | Supplier Device Package [x] | Supplier Device Package [y] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74HCS595DR | Shift Register | Surface Mount | 16-SOIC | 0.154 in, 3.9 mm Width | Tri-State | Serial to Parallel | 1 | 16-SOIC | -40 °C | 125 °C | 2 V | 6 V | 8 | ||||
Texas Instruments SN74HCS595PWR | Shift Register | Surface Mount | 16-TSSOP | Tri-State | Serial to Parallel | 1 | 16-TSSOP | -40 °C | 125 °C | 2 V | 6 V | 8 | 0.173 " | 4.4 mm | |||
Texas Instruments SN74HCS595DYYR | Shift Register | Surface Mount | Tri-State | Serial to Parallel | 1 | 16-SOT-23-THIN | -40 °C | 125 °C | 2 V | 6 V | 8 | ||||||
Texas Instruments SN74HCS595BQBR | Shift Register | Surface Mount | 16-WFQFN Exposed Pad | Tri-State | Serial to Parallel | 1 | 16-WQFN | -40 °C | 125 °C | 2 V | 6 V | 8 | 2.5 | 3.5 |
Description
General part information
SN74HCS595 Series
The SN74HCS595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput.
The SN74HCS595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput.
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Technical documentation and resources