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SN74HCS595 Series

8-bit shift register with Schmitt-trigger inputs and 3-state output registers

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

8-bit shift register with Schmitt-trigger inputs and 3-state output registers

PartLogic TypeMounting TypePackage / CasePackage / CaseOutput TypeFunctionNumber of Elements [custom]Supplier Device PackageOperating Temperature [Min]Operating Temperature [Max]Voltage - Supply [Min]Voltage - Supply [Max]Number of Bits per ElementPackage / Case [x]Package / Case [x]Supplier Device Package [x]Supplier Device Package [y]
Texas Instruments
SN74HCS595DR
Shift Register
Surface Mount
16-SOIC
0.154 in, 3.9 mm Width
Tri-State
Serial to Parallel
1
16-SOIC
-40 °C
125 °C
2 V
6 V
8
Texas Instruments
SN74HCS595PWR
Shift Register
Surface Mount
16-TSSOP
Tri-State
Serial to Parallel
1
16-TSSOP
-40 °C
125 °C
2 V
6 V
8
0.173 "
4.4 mm
Texas Instruments
SN74HCS595DYYR
Shift Register
Surface Mount
Tri-State
Serial to Parallel
1
16-SOT-23-THIN
-40 °C
125 °C
2 V
6 V
8
Texas Instruments
SN74HCS595BQBR
Shift Register
Surface Mount
16-WFQFN Exposed Pad
Tri-State
Serial to Parallel
1
16-WQFN
-40 °C
125 °C
2 V
6 V
8
2.5
3.5

Key Features

Wide operating voltage range: 2 V to 6 VSchmitt-trigger inputs allow for slow or noisy input signalsLow power consumptionTypical ICCof 100 nATypical input leakage current of ±100 nA±7.8-mA output drive at 6 VExtended ambient temperature range: –40°C to +125°C, TAWide operating voltage range: 2 V to 6 VSchmitt-trigger inputs allow for slow or noisy input signalsLow power consumptionTypical ICCof 100 nATypical input leakage current of ±100 nA±7.8-mA output drive at 6 VExtended ambient temperature range: –40°C to +125°C, TA

Description

AI
The SN74HCS595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput. The SN74HCS595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput.