
SN74LVC08ADR
ActiveTexas Instruments
FOUR-CHANNEL TWO-INPUT 1.65V TO 3.6V AND GATE

SN74LVC08ADR
ActiveTexas Instruments
FOUR-CHANNEL TWO-INPUT 1.65V TO 3.6V AND GATE
Description
General part information
SN74LVC08A Series
Four-channel two-input 1.65V to 3.6V AND gate
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVC08ADR |
|---|---|
| Current - Output High | 24 mA |
| Current - Output Low | 24 mA |
| Current - Quiescent (Max) | 1 µA |
| Input Logic Level - High (Max) | 2 V |
| Input Logic Level - High (Min) | 1.7 V |
| Input Logic Level - Low (Max) | 0.8 V |
| Input Logic Level - Low (Min) | 0.7 V |
| Logic Type | AND Gate |
| Max CL | 50 pF |
| Max Propagation Delay | 3.9 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package Length | 0.154 in |
| Package Name | 14-SOIC |
| Package Width | 3.9 mm |
| Voltage - Supply (Maximum) | 3.6 V |
| Voltage - Supply (Minimum) | 1.65 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
Logic Guide (Rev. AB)
LOGIC Pocket Data Book (Rev. B)
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Signal Switch Data Book (Rev. A)
Optimizing DC Fast Charger Systems Using Logic and Translation
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Selecting the Right Level Translation Solution (Rev. A)
Standard Linear & Logic for PCs, Servers & Motherboards
Texas Instruments Little Logic Application Report
How to Select Little Logic (Rev. A)
Low-Voltage Logic (LVC) Designer's Guide
LVC Characterization Information
Input and Output Characteristics of Digital Integrated Circuits
CMOS Power Consumption and CPD Calculation (Rev. B)
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
Little Logic Guide 2018 (Rev. G)
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
SNx4LVC08A Quadruple 2-Input Positive-AND Gates datasheet (Rev. W)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Understanding Advanced Bus-Interface Products Design Guide
Optimizing Board Space for Discrete LOGIC Designs Using Smallest Package Solutio (Rev. A)
TI IBIS File Creation, Validation, and Distribution Processes
Live Insertion
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Implications of Slow or Floating CMOS Inputs (Rev. E)
Design Summary for WCSP Little Logic (Rev. B)