Zenode.ai Logo
CDCM61001RHBT - 32-pin (RHB) package image

CDCM61001RHBT

Active
Texas Instruments

1:1 ULTRA-LOW JITTER CRYSTAL-IN CLOCK GENERATOR 32-VQFN -40 TO 85

Deep-Dive with AI

Search across all available documentation for this part.

CDCM61001RHBT - 32-pin (RHB) package image

CDCM61001RHBT

Active
Texas Instruments

1:1 ULTRA-LOW JITTER CRYSTAL-IN CLOCK GENERATOR 32-VQFN -40 TO 85

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationCDCM61001RHBTCDCM61001 Series
Differential - Input:Output [custom]FalseFalse
Differential - Input:Output [custom]FalseFalse
Divider/MultiplierYes/NoYes/No
Frequency - Max [Max]683.28 MHz683.28 MHz
InputLVCMOS, CrystalLVCMOS, Crystal
Mounting TypeSurface MountSurface Mount
Number of Circuits11
Operating Temperature [Max]85 °C85 °C
Operating Temperature [Min]-40 °C-40 °C
OutputLVPECL, LVCMOS, LVDSLVPECL, LVCMOS, LVDS
Package / Case32-VFQFN Exposed Pad32-VFQFN Exposed Pad
PLLYes with BypassYes with Bypass
Ratio - Input:Output [custom]11
Ratio - Input:Output [custom]22
Supplier Device Package32-VQFN (5x5)32-VQFN (5x5)
TypeClock GeneratorClock Generator
Voltage - Supply [Max]3.6 V3.6 V
Voltage - Supply [Min]3 V3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigiKeyN/A 1$ 6.06
10$ 4.65
25$ 4.29
100$ 3.91
250$ 3.72
500$ 3.61
750$ 3.55
1250$ 3.49
1750$ 3.46
2500$ 3.42
DigikeyCut Tape (CT) 1$ 4.28
10$ 3.87
25$ 3.69
100$ 3.20
Digi-Reel® 1$ 4.28
10$ 3.87
25$ 3.69
100$ 3.20
Tape & Reel (TR) 250$ 3.17
Mouser ElectronicsN/A 1$ 5.16
10$ 4.22
25$ 3.97
100$ 3.64
250$ 3.62
1000$ 3.53
Rochester ElectronicsN/A 1$ 3.52
25$ 3.45
100$ 3.31
500$ 3.17
1000$ 2.99
Texas InstrumentsSMALL T&R 1$ 4.66
100$ 3.80
250$ 2.99
1000$ 2.53
Win Source ElectronicsN/A 12$ 4.24
29$ 3.48
45$ 3.37
62$ 3.26
80$ 3.15
107$ 2.83

CDCM61001 Series

1:1 ultra-low jitter crystal-in clock generator

PartFrequency - Max [Max]Supplier Device PackageVoltage - Supply [Max]Voltage - Supply [Min]Differential - Input:Output [custom]Differential - Input:Output [custom]Ratio - Input:Output [custom]Ratio - Input:Output [custom]Number of CircuitsInputTypeDivider/MultiplierPLLOutputMounting TypePackage / CaseOperating Temperature [Min]Operating Temperature [Max]
Texas Instruments
CDCM61001RHBT
683.28 MHz
32-VQFN (5x5)
3.6 V
3 V
1
2
1
Crystal, LVCMOS
Clock Generator
Yes/No
Yes with Bypass
LVCMOS, LVDS, LVPECL
Surface Mount
32-VFQFN Exposed Pad
-40 °C
85 °C
Texas Instruments
CDCM61001RHBR
683.28 MHz
32-VQFN (5x5)
3.6 V
3 V
1
2
1
Crystal, LVCMOS
Clock Generator
Yes/No
Yes with Bypass
LVCMOS, LVDS, LVPECL
Surface Mount
32-VFQFN Exposed Pad
-40 °C
85 °C
Texas Instruments
CDCM61001RHBR/2801
683.28 MHz
32-VQFN (5x5)
3.6 V
3 V
1
2
1
Crystal, LVCMOS
Clock Generator
Yes/No
Yes with Bypass
LVCMOS, LVDS, LVPECL
Surface Mount
32-VFQFN Exposed Pad
-40 °C
85 °C

Description

General part information

CDCM61001 Series

The CDCM61001 is a highly versatile, low-jitter frequency synthesizer that can generate low-jitter clock outputs, selectable between low-voltage positive emitter coupled logic (LVPECL), low-voltage differential signaling (LVDS), or low-voltage complementary metal oxide semiconductor (LVCMOS) outputs, from a low-frequency crystal or LVCMOS input for a variety of wireline and data communication applications. The CDCM61001 features an onboard PLL that can be easily configured solely through control pins. The overall output random jitter performance is less than 1ps, RMS (from 10 kHz to 20 MHz), making this device a perfect choice for use in demanding applications such as SONET, Ethernet, Fibre Channel, and SAN. The CDCM61001 is available in a small, 32-pin, 5-mm × 5-mm QFN package.

The CDCM61001 is a high-performance, low phase noise, fully-integrated voltage-controlled oscillator (VCO) clock synthesizer with one universal output buffer that can be configured to be LVPECL, LVDS, or LVCMOS compatible. The universal output can also be converted to two LVCMOS outputs. Additionally, an LVCMOS bypass output clock is available in an output configuration which can help with crystal loading in order to achieve an exact desired input frequency. It has one fully-integrated, low-noise, LC-based VCO that operates in the 1.75 GHz to 2.05 GHz range.

The phase-locked loop (PLL) synchronizes the VCO with respect to the input, which can either be a low-frequency crystal. The output has an output divider sourced from the VCO core. All device settings are managed through a control pin structure, which has two pins that control the prescaler and feedback divider, three pins that control the output divider, two pins that control the output type, and one pin that controls the output enable. Any time the PLL settings (including the input frequency, prescaler divider, or feedback divider) are altered, a reset must be issued through the Reset control pin (active low for device reset). The reset initiates a PLL recalibration process to ensure PLL lock. When the device is in reset, the outputs and divider are turned off.