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SN74LVC125ABQAR

SN74LVC125ABQAR

Active
Texas Instruments

FOUR-CHANNEL 1.65V-TO-3.6V BUFFERS WITH 3-STATE OUTPUTS

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SN74LVC125ABQAR

SN74LVC125ABQAR

Active
Texas Instruments

FOUR-CHANNEL 1.65V-TO-3.6V BUFFERS WITH 3-STATE OUTPUTS

Find alt

Description

General part information

SN74LVC125A Series

This quadruple bus buffer gate is designed for 1.65V to 3.6V VCC operation.

The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC125ABQAR
Current - Output High24 mA
Current - Output Low24 mA
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element1 bits
Number of Elements4
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Output Type3-State
Package / Case14-WFQFN Exposed Pad
Package Length3 mm
Package Name14-WQFN
Package Width2.5 mm
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)1.65 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

SN74LVC125ABQAR | Datasheet
Understanding Advanced Bus-Interface Products Design Guide
Signal Switch Data Book (Rev. A)
Texas Instruments Little Logic Application Report
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Low-Voltage Logic (LVC) Designer's Guide
Optimizing Optical Network Terminal Units With Logic
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Logic Guide (Rev. AB)
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
LOGIC Pocket Data Book (Rev. B)
How to Select Little Logic (Rev. A)
Live Insertion
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
Little Logic Guide 2018 (Rev. G)
Input and Output Characteristics of Digital Integrated Circuits
Design Summary for WCSP Little Logic (Rev. B)
Optimizing Board Space for Discrete LOGIC Designs Using Smallest Package Solutio (Rev. A)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Standard Linear & Logic for PCs, Servers & Motherboards
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
CMOS Power Consumption and CPD Calculation (Rev. B)
LVC Characterization Information
TI IBIS File Creation, Validation, and Distribution Processes
SN74LVC125A Quadruple Bus Buffer Gate With 3-State Outputs datasheet (Rev. T)
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Implications of Slow or Floating CMOS Inputs (Rev. E)
Selecting the Right Level Translation Solution (Rev. A)