
CDCDB803RSLT
Active8-OUTPUT CLOCK BUFFER FOR PCIE® GEN 1 TO GEN 6 WITH SELECTABLE SMBUS ADDRESSES

CDCDB803RSLT
Active8-OUTPUT CLOCK BUFFER FOR PCIE® GEN 1 TO GEN 6 WITH SELECTABLE SMBUS ADDRESSES
Description
General part information
CDCDB803 Series
The CDCDB803 is a 8-output LP-HCSL, DB800ZL-compliant, clock buffer capable of distributing the reference clock for PCIe Gen 1-6, QuickPath Interconnect (QPI), UPI, SAS, and SATA interfaces. The SMBus interface and eight output enable pins allow the configuration and control of all eight outputs individually. The CDCDB803 is a DB800ZL derivative buffer and meets or exceeds the system parameters in the DB800ZL specification. It also meets or exceeds the parameters in the DB2000Q specification. The CDCDB803 is packaged in a 6-mm × 6-mm, 48-pin VQFN package.
The CDCDB803 is a 8-output LP-HCSL, DB800ZL-compliant, clock buffer capable of distributing the reference clock for PCIe Gen 1-6, QuickPath Interconnect (QPI), UPI, SAS, and SATA interfaces. The SMBus interface and eight output enable pins allow the configuration and control of all eight outputs individually. The CDCDB803 is a DB800ZL derivative buffer and meets or exceeds the system parameters in the DB800ZL specification. It also meets or exceeds the parameters in the DB2000Q specification. The CDCDB803 is packaged in a 6-mm × 6-mm, 48-pin VQFN package.
Technical Specifications
Parameters and characteristics for this part
| Specification | CDCDB803RSLT |
|---|---|
| Differential Input | Yes |
| Differential Output | Yes |
| Frequency - Max | 250 MHz |
| Input | HCSL, Clock |
| Input Ratio | 1 |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature (Max) | 105 °C |
| Operating Temperature (Min) | -40 °C |
| Output | HCSL, Clock |
| Output Ratio | 8 |
| Package / Case | 48-VFQFN Exposed Pad |
| Package Length | 6 mm |
| Package Name | 48-VQFN |
| Package Width | 6 mm |
| Type | Clock Buffer |
| Voltage - Supply (Maximum) | 3.6 V |
| Voltage - Supply (Minimum) | 3 V |
Pricing
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