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M48Z35-70PC1 - M48Z28 Series

M48Z35-70PC1

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STMicroelectronics

256 KBIT (32 KBIT X 8) ZEROPOWER® SRAM

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M48Z35-70PC1 - M48Z28 Series

M48Z35-70PC1

Active
STMicroelectronics

256 KBIT (32 KBIT X 8) ZEROPOWER® SRAM

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Technical Specifications

Parameters and characteristics for this part

SpecificationM48Z35-70PC1
Access Time70 ns
Memory FormatNVSRAM
Memory InterfaceParallel
Memory Organization32K x 8
Memory Size32 KB
Memory TypeNon-Volatile
Mounting TypeThrough Hole
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Package / Case0.6 in
Package / Case28-DIP Module
Package / Case15.24 mm
Supplier Device Package28-PCDIP, CAPHAT®
TechnologyNVSRAM (Non-Volatile SRAM)
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 22.44
12$ 20.89
36$ 20.67
60$ 20.16
108$ 17.70
252$ 17.10
504$ 16.64
NewarkEach 1$ 21.99
5$ 21.10
10$ 20.22
25$ 19.33
50$ 18.26
100$ 17.78
480$ 17.24

Description

General part information

M48Z35 Series

The M48Z35/Y ZEROPOWER®RAM is a 32 K x 8, non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory solution.

The M48Z35/Y is a non-volatile pin and function equivalent to any JEDEC standard 32 K x 8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed. The 28-pin 600 mil DIP CAPHAT™houses the M48Z35/Y silicon with a long life lithium button cell in a single package.

The 28-pin 330 mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT®housing containing the battery. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process. Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is keyed to prevent reverse insertion.