SN74AHC02RGYR
ActiveTexas Instruments
4-CH, 2-INPUT, 2-V TO 5.5-V NOR GATES
SN74AHC02RGYR
ActiveTexas Instruments
4-CH, 2-INPUT, 2-V TO 5.5-V NOR GATES
Description
General part information
74AHC02 Series
The ’AHC02 device contains four independent 2-input NOR gates that perform the Boolean function Y = A\ • B\ or Y = (A + B)\ in positive logic.
The ’AHC02 device contains four independent 2-input NOR gates that perform the Boolean function Y = A\ • B\ or Y = (A + B)\ in positive logic.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74AHC02RGYR |
|---|---|
| Current - Output High | 8 mA |
| Current - Output Low | 8 mA |
| Current - Quiescent (Max) | 2 µA |
| Input Logic Level - High (Max) | 3.85 V |
| Input Logic Level - High (Min) | 1.5 V |
| Input Logic Level - Low (Max) | 1.65 V |
| Input Logic Level - Low (Min) | 0.5 V |
| Logic Type | NOR Gate |
| Max CL | 50 pF |
| Max Propagation Delay | 8.5 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 14-VFQFN Exposed Pad |
| Package Length | 3.5 mm |
| Package Name | 14-VQFN |
| Package Width | 3.5 mm |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 2 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
SN74AHC02RGYR | Datasheet
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
SNx4AHC02 Quadruple 2-Input Positive-Nor Gates datasheet (Rev. N)
Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)
Texas Instruments Little Logic Application Report
How to Select Little Logic (Rev. A)
TI IBIS File Creation, Validation, and Distribution Processes
Selecting the Right Level Translation Solution (Rev. A)
Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Design Summary for WCSP Little Logic (Rev. B)
AHC/AHCT Designer's Guide February 2000 (Rev. D)
Little Logic Guide 2018 (Rev. G)
CMOS Power Consumption and CPD Calculation (Rev. B)
Logic Guide (Rev. AB)
Implications of Slow or Floating CMOS Inputs (Rev. E)
Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
Live Insertion
LOGIC Pocket Data Book (Rev. B)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
