SN74ALS174DR

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Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 1-ELEMENT 16-PIN SOIC T/R

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SN74ALS174DR

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Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 1-ELEMENT 16-PIN SOIC T/R

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Description Specifications Series Pricing CAD Documents

Description

General part information

74ALS174 Series

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR)\ input. The ’ALS175 and ’AS175B feature complementary outputs from each flip-flop.

Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.

These circuits are fully compatible for use with most TTL circuits.

Technical Specifications

Parameters and characteristics for this part

Specification	SN74ALS174DR

Clock Frequency	50 MHz
Current - Output High	400 µA
Current - Output Low	8 mA
Current - Quiescent (Iq)	19 mA
Function	Master Reset
Max CL	50 pF
Max Propagation Delay	17 ns
Mounting Type	Surface Mount
Number of Bits per Element	6 bits
Number of Elements	1
Operating Temperature (Max)	70 °C
Operating Temperature (Min)	0 °C
Output Type	Non-Inverted
Package Length	0.154 in
Package Name	16-SOIC
Package Width	3.9 mm
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply (Maximum)	5.5 V
Voltage - Supply (Minimum)	4.5 V

74ALS174 Series

Part	Output Type	Package Length	Package Name	Package Width	Type	Function	Current - Quiescent (Iq)	Trigger Type	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Current - Output High	Current - Output Low	Number of Elements	Mounting Type	Number of Bits per Element	Max CL	Max Propagation Delay	Clock Frequency	Operating Temperature (Min)	Operating Temperature (Max)
Texas Instruments SN74ALS174N	Non-Inverted	0.3 in	16-DIP 16-PDIP	7.62 mm	D-Type	Master Reset	19 mA	Positive Edge	5.5 V	4.5 V	400 µA	8 mA	1	Through Hole	6 bits	50 pF	17 ns	50 MHz	0 °C	70 °C
Texas Instruments SN74ALS174NSR	Non-Inverted	0.209 in	16-SO 16-SOIC	5.3 mm	D-Type	Master Reset	19 mA	Positive Edge	5.5 V	4.5 V	400 µA	8 mA	1	Surface Mount	6 bits	50 pF	17 ns	50 MHz	0 °C	70 °C
Texas Instruments SN74ALS174DR	Non-Inverted	0.154 in	16-SOIC	3.9 mm	D-Type	Master Reset	19 mA	Positive Edge	5.5 V	4.5 V	400 µA	8 mA	1	Surface Mount	6 bits	50 pF	17 ns	50 MHz	0 °C	70 °C
Texas Instruments SN74ALS174D	Non-Inverted	0.154 in	16-SOIC	3.9 mm	D-Type	Master Reset	19 mA	Positive Edge	5.5 V	4.5 V	400 µA	8 mA	1	Surface Mount	6 bits	50 pF	17 ns	50 MHz	0 °C	70 °C
Texas Instruments SN74ALS174FN
Texas Instruments SN74ALS174DRG4	Non-Inverted	0.154 in	16-SOIC	3.9 mm	D-Type	Master Reset	19 mA	Positive Edge	5.5 V	4.5 V	400 µA	8 mA	1	Surface Mount	6 bits	50 pF	17 ns	50 MHz	0 °C	70 °C

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

Hex/Quadruple D-Type Flip-Flops With Clear datasheet (Rev. E)