
ADC08D502CIYB/NOPB
ActiveDUAL-CHANNEL, 8-BIT, 500-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC) 128-HLQFP -40 TO 85
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ADC08D502CIYB/NOPB
ActiveDUAL-CHANNEL, 8-BIT, 500-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC) 128-HLQFP -40 TO 85
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Technical Specifications
Parameters and characteristics for this part
Specification | ADC08D502CIYB/NOPB |
---|---|
Architecture | Folding Interpolating |
Configuration | MUX-S/H-ADC |
Data Interface | LVDS - Parallel |
Features | Simultaneous Sampling |
Input Type | Differential |
Mounting Type | Surface Mount |
Number of A/D Converters | 2 |
Number of Bits | 8 |
Number of Inputs | 2 |
Operating Temperature [Max] | 85 °C |
Operating Temperature [Min] | -40 °C |
Ratio - S/H:ADC | 1:1 |
Reference Type | Internal |
Sampling Rate (Per Second) | 500 M |
Supplier Device Package | 128-HLQFP (20x20) |
Voltage - Supply, Analog [Max] | 2 V |
Voltage - Supply, Analog [Min] | 1.8 V |
Voltage - Supply, Digital [Max] | 2 V |
Voltage - Supply, Digital [Min] | 1.8 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
ADC08D502 Series
Dual-Channel, 8-Bit, 500-MSPS Analog-to-Digital Converter (ADC)
Part | Voltage - Supply, Analog [Min] | Voltage - Supply, Analog [Max] | Reference Type | Number of Inputs | Architecture | Ratio - S/H:ADC | Voltage - Supply, Digital [Min] | Voltage - Supply, Digital [Max] | Configuration | Data Interface | Number of A/D Converters | Mounting Type | Operating Temperature [Min] | Operating Temperature [Max] | Sampling Rate (Per Second) | Supplier Device Package | Features | Input Type | Number of Bits |
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Texas Instruments ADC08D502CIYB/NOPBThe ADC08D502 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 500 MSPS. Consuming a typical 1.4 Watts at 500 MSPS from a single 1.9 Volt supply, this device is specified to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 250 MHz input signal and a 500 MHz sample rate while providing a 10-18B.E.R. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.
Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate.
The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤ TA≤ +85°C) temperature range.
The ADC08D502 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 500 MSPS. Consuming a typical 1.4 Watts at 500 MSPS from a single 1.9 Volt supply, this device is specified to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 250 MHz input signal and a 500 MHz sample rate while providing a 10-18B.E.R. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.
Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate.
The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤ TA≤ +85°C) temperature range. | 1.8 V | 2 V | Internal | 2 | Folding Interpolating | 1:1 | 1.8 V | 2 V | MUX-S/H-ADC | LVDS - Parallel | 2 | Surface Mount | -40 °C | 85 °C | 500 M | 128-HLQFP (20x20) | Simultaneous Sampling | Differential | 8 |
Description
General part information
ADC08D502 Series
The ADC08D502 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 500 MSPS. Consuming a typical 1.4 Watts at 500 MSPS from a single 1.9 Volt supply, this device is specified to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 250 MHz input signal and a 500 MHz sample rate while providing a 10-18B.E.R. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.
Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate.
The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤ TA≤ +85°C) temperature range.
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