Zenode.ai Logo
SOIC (D)

SN74LVC74AQDRG4Q1

Active
Texas Instruments

AUTOMOTIVE, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

Find alt
SOIC (D)

SN74LVC74AQDRG4Q1

Active
Texas Instruments

AUTOMOTIVE, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

Find alt

Description

General part information

74LVC74 Series

The SN74LVC74A dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCCoperation.

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. WhenPREandCLRare inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as a translator in a mixed 3.3 V/5 V system environment.

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC74AQDRG4Q1
Clock Frequency150 MHz
Current - Output High24 mA
Current - Output Low24 mA
Current - Quiescent (Iq)10 µA
FunctionSet(Preset) and Reset
GradeAutomotive
Input Capacitance5 pF
Max CL50 pF
Max Propagation Delay5.2 ns
Mounting TypeSurface Mount
Number of Bits per Element1 bits
Number of Elements2
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Output TypeComplementary
Package Length0.154 in
Package Name14-SOIC
Package Width3.9 mm
QualificationAEC-Q100
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Sign in to see pricing

Create a free account to access distributor pricing data.

Sign up — freeLog in

CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

LVC Characterization Information
Signal Switch Data Book (Rev. A)
Input and Output Characteristics of Digital Integrated Circuits
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
SN74LVC74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset datasheet (Rev. E)
How to Select Little Logic (Rev. A)
LOGIC Pocket Data Book (Rev. B)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Live Insertion
Automotive Logic Devices Brochure
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
TI IBIS File Creation, Validation, and Distribution Processes
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Understanding Advanced Bus-Interface Products Design Guide
Low-Voltage Logic (LVC) Designer's Guide
Selecting the Right Level Translation Solution (Rev. A)
Logic Guide (Rev. AB)
Design Summary for WCSP Little Logic (Rev. B)
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Texas Instruments Little Logic Application Report
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
CMOS Power Consumption and CPD Calculation (Rev. B)
Standard Linear & Logic for PCs, Servers & Motherboards
Little Logic Guide 2018 (Rev. G)
Implications of Slow or Floating CMOS Inputs (Rev. E)
Power-Up Behavior of Clocked Devices (Rev. B)
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)