Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | SN74HC240DWE4 | 74HC240 Series |
|---|---|---|
| Current - Output High, Low | 7.8 mA, 7.8 mA | 7.8 mA |
| Logic Type | Inverting, Buffer | Inverting, Buffer |
| Mounting Type | Surface Mount | Surface Mount, Through Hole |
| Number of Bits per Element | 4 | 4 |
| Number of Elements [custom] | 2 | 2 |
| Operating Temperature [Max] | 85 °C | 85 - 125 °C |
| Operating Temperature [Min] | -40 °C | -55 - -40 C |
| Output Type | 3-State | 3-State |
| Package / Case | 7.5 mm, 0.295 in | 0.173 - 7.5 mm |
| Package / Case | 20-SOIC | 20-SOIC, 20-DIP, 20-TSSOP, 20-SSOP |
| Package / Case | - | 0.3 - 4.4 in |
| Package / Case | - | 7.62 mm |
| Supplier Device Package | 20-SOIC | 20-SOIC, 20-PDIP, 20-TSSOP, 20-SO, 20-SSOP |
| Voltage - Supply [Max] | 6 V | 6 V |
| Voltage - Supply [Min] | 2 V | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
74HC240 Series
8-ch, 2V to 6V inverters with 3-state outputs
| Part | Supplier Device Package | Voltage - Supply [Min] | Voltage - Supply [Max] | Package / Case | Package / Case | Current - Output High, Low | Mounting Type | Logic Type | Number of Bits per Element | Output Type | Number of Elements [custom] | Operating Temperature [Min] | Operating Temperature [Max] | Package / Case | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
20-SOIC | 2 V | 6 V | 0.295 in, 7.5 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -55 C | 125 °C | |||
20-PDIP | 2 V | 6 V | 20-DIP | 7.8 mA, 7.8 mA | Through Hole | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 0.3 in | 7.62 mm | ||
Texas Instruments SN74HC240NThese octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. | 20-PDIP | 2 V | 6 V | 20-DIP | 7.8 mA, 7.8 mA | Through Hole | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 0.3 in | 7.62 mm | |
20-TSSOP | 2 V | 6 V | 0.173 in | 20-TSSOP | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 4.4 mm | ||
20-SO | 2 V | 6 V | 0.209 in, 5.3 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | |||
Texas Instruments SN74HC240APWRG4Buffer, Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 2 V | 6 V | 0.173 in | 20-TSSOP | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 4.4 mm | |
Texas Instruments SN74HC240NSRThese octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. | 20-SO | 2 V | 6 V | 0.209 in, 5.3 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | ||
20-PDIP | 2 V | 6 V | 20-DIP | 7.8 mA, 7.8 mA | Through Hole | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 0.3 in | 7.62 mm | ||
Texas Instruments SN74HC240DBRThese octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. | 20-SSOP | 2 V | 6 V | 0.209 in, 5.3 mm | 20-SSOP | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | ||
20-SO | 2 V | 6 V | 0.209 in, 5.3 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | |||
Texas Instruments SN74HC240DWRThese octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. | 20-SOIC | 2 V | 6 V | 0.295 in, 7.5 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | ||
20-TSSOP | 2 V | 6 V | 0.173 in | 20-TSSOP | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 4.4 mm | ||
20-PDIP | 2 V | 6 V | 20-DIP | 7.8 mA, 7.8 mA | Through Hole | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 0.3 in | 7.62 mm | ||
20-SO | 2 V | 6 V | 0.209 in, 5.3 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | |||
20-SO | 2 V | 6 V | 0.209 in, 5.3 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | |||
20-SOIC | 2 V | 6 V | 0.295 in, 7.5 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | |||
20-PDIP | 2 V | 6 V | 20-DIP | 7.8 mA, 7.8 mA | Through Hole | Buffer, Inverting | 4 | 3-State | 2 | -55 C | 125 °C | 0.3 in | 7.62 mm | ||
Texas Instruments SN74HC240PWRThese octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. | 20-TSSOP | 2 V | 6 V | 0.173 in | 20-TSSOP | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 4.4 mm | |
20-TSSOP | 2 V | 6 V | 0.173 in | 20-TSSOP | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C | 4.4 mm | ||
20-SOIC | 2 V | 6 V | 0.295 in, 7.5 mm | 20-SOIC | 7.8 mA, 7.8 mA | Surface Mount | Buffer, Inverting | 4 | 3-State | 2 | -40 °C | 85 °C |
Description
General part information
74HC240 Series
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.