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SN74LVC1G10DBVR

SN74LVC1G10DBVR

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Texas Instruments

NAND GATE 1-ELEMENT 3-IN CMOS 6-PIN SOT-23 T/R

SN74LVC1G10DBVR

SN74LVC1G10DBVR

Active

Texas Instruments

NAND GATE 1-ELEMENT 3-IN CMOS 6-PIN SOT-23 T/R

Description Specifications Series Pricing CAD Documents

Description

General part information

SN74LVC1G10 Series

The SN74LVC1G10 performs the Boolean function Y =A • B • Cor Y =A+B+Cin positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LVC1G10DBVR

Current - Output High	32 mA
Current - Output Low	32 mA
Current - Quiescent (Max)	10 µA
Input Logic Level - High (Max)	2 V
Input Logic Level - High (Min)	1.7 V
Input Logic Level - Low (Max)	0.8 V
Input Logic Level - Low (Min)	0.7 V
Logic Type	NAND Gate
Max CL	50 pF
Max Propagation Delay	3.6 ns
Mounting Type	Surface Mount
Number of Circuits	1
Number of Inputs	3
Operating Temperature (Max)	125 °C
Operating Temperature (Min)	-40 °C
Package / Case	SOT-23-6
Package Name	SOT-23-6
Voltage - Supply (Maximum)	5.5 V
Voltage - Supply (Minimum)	1.65 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

CMOS Power Consumption and CPD Calculation (Rev. B)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Implications of Slow or Floating CMOS Inputs (Rev. E)

LOGIC Pocket Data Book (Rev. B)

Low-Voltage Logic (LVC) Designer's Guide

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

SN74LVC1G10 datasheet (Rev. E)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Selecting the Right Level Translation Solution (Rev. A)

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

TI IBIS File Creation, Validation, and Distribution Processes

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Input and Output Characteristics of Digital Integrated Circuits

Texas Instruments Little Logic Application Report

LVC Characterization Information

Understanding Advanced Bus-Interface Products Design Guide

Logic Guide (Rev. AB)

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

Standard Linear & Logic for PCs, Servers & Motherboards

Little Logic Guide 2018 (Rev. G)

How to Select Little Logic (Rev. A)

MSPM0-Based Medical Alarm Design

Design Summary for WCSP Little Logic (Rev. B)

Signal Switch Data Book (Rev. A)

SN74LVC1G10 Series

Part	Max Propagation Delay	Max CL	Mounting Type	Package Width	Package Name	Package Length	Package / Case	Logic Type	Operating Temperature (Max)	Operating Temperature (Min)	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Input Logic Level - Low (Max)	Input Logic Level - Low (Min)	Input Logic Level - High (Min)	Input Logic Level - High (Max)	Number of Circuits	Number of Inputs	Current - Quiescent (Max)	Current - Output High	Current - Output Low
Texas Instruments SN74LVC1G10DRYR	3.6 ns	50 pF	Surface Mount	1 mm	6-SON	1.45 mm	6-UFDFN	NAND Gate	125 °C	-40 °C	1.65 V	5.5 V	0.8 V	0.7 V	1.7 V	2 V	1	3	10 µA	32 mA	32 mA
Texas Instruments SN74LVC1G10YEPR	3.6 ns	50 pF	Surface Mount		6-DSBGA		6-XFBGA DSBGA	NAND Gate	85 °C	-40 °C	1.65 V	5.5 V	0.8 V	0.7 V	1.7 V	2 V	1	3	10 µA	32 mA	32 mA