74LVC1G10 Series

Single 3-input, 1.65-V to 5.5-V NAND gate

Catalog

Single 3-input, 1.65-V to 5.5-V NAND gate

Part	Max Propagation Delay	Max CL	Mounting Type	Package Width	Package Name	Package Length	Package / Case	Logic Type	Operating Temperature (Max)	Operating Temperature (Min)	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Input Logic Level - Low (Max)	Input Logic Level - Low (Min)	Input Logic Level - High (Min)	Input Logic Level - High (Max)	Number of Circuits	Number of Inputs	Current - Quiescent (Max)	Current - Output High	Current - Output Low
Texas Instruments SN74LVC1G10DRYR	3.6 ns	50 pF	Surface Mount	1 mm	6-SON	1.45 mm	6-UFDFN	NAND Gate	125 °C	-40 °C	1.65 V	5.5 V	0.8 V	0.7 V	1.7 V	2 V	1	3	10 µA	32 mA	32 mA
Texas Instruments SN74LVC1G10YEPR	3.6 ns	50 pF	Surface Mount		6-DSBGA		6-XFBGA DSBGA	NAND Gate	85 °C	-40 °C	1.65 V	5.5 V	0.8 V	0.7 V	1.7 V	2 V	1	3	10 µA	32 mA	32 mA

Catalog

Single 3-input, 1.65-V to 5.5-V NAND gate

Description

The SN74LVC1G10 performs the Boolean function Y =A • B • Cor Y =A+B+Cin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74LVC1G10 performs the Boolean function Y =A • B • Cor Y =A+B+Cin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.