Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | CDCLVP1212EVM | CDCLVP1212 Series |
|---|---|---|
| Differential - Input:Output | - | True |
| Differential - Input:Output | - | True |
| Embedded | False | False |
| Frequency - Max | - | 2 GHz |
| Function | Clock Buffer | Clock Buffer |
| Input | - | LVCMOS, LVTTL, LVPECL, LVDS |
| Mounting Type | - | Surface Mount |
| Number of Circuits | - | 1 |
| Operating Temperature | - | -40 °C |
| Operating Temperature | - | 85 °C |
| Output | - | LVPECL |
| Package / Case | - | 40-VFQFN Exposed Pad |
| Ratio - Input:Output | - | 2 |
| Ratio - Input:Output | - | 12 |
| Supplied Contents | Board(s) | Board(s) |
| Supplier Device Package | - | 40-VQFN (6x6) |
| Type | Timing | Multiplexer, Fanout Buffer (Distribution), Timing |
| Utilized IC / Part | CDCLVP1212 | CDCLVP1212 |
| Voltage - Supply | - | 2.375 V |
| Voltage - Supply | - | 3.6 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Box | 1 | $ 157.34 | |
CDCLVP1212 Series
Low jitter, 2-input selectable 1:12 universal-to-LVPECL buffer
| Part | Frequency - Max [Max] | Type | Output | Package / Case | Operating Temperature [Min] | Operating Temperature [Max] | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Mounting Type | Input | Number of Circuits | Supplier Device Package | Voltage - Supply [Min] | Voltage - Supply [Max] | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Supplied Contents | Function | Utilized IC / Part | Embedded |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCLVP1212RHAT | 2 GHz | Fanout Buffer (Distribution), Multiplexer | LVPECL | 40-VFQFN Exposed Pad | -40 °C | 85 °C | Surface Mount | LVCMOS, LVDS, LVPECL, LVTTL | 1 | 40-VQFN (6x6) | 2.375 V | 3.6 V | 2 | 12 | ||||||
Texas Instruments CDCLVP1212RHAR | 2 GHz | Fanout Buffer (Distribution), Multiplexer | LVPECL | 40-VFQFN Exposed Pad | -40 °C | 85 °C | Surface Mount | LVCMOS, LVDS, LVPECL, LVTTL | 1 | 40-VQFN (6x6) | 2.375 V | 3.6 V | 2 | 12 | ||||||
Texas Instruments CDCLVP1212EVM | Timing | Board(s) | Clock Buffer | CDCLVP1212 |
Description
General part information
CDCLVP1212 Series
The CDCLVP1212 is a highly versatile, low additive jitter buffer that can generate 12 copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of communication applications. It has a maximum clock frequency up to 2 GHz. The CDCLVP1212 features an on-chip multiplexer (MUX) for selecting one of two inputs that can be easily configured solely through a control terminal. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to 20 MHz, and overall output skew is as low as 25 ps, making the device a perfect choice for use in demanding applications.
The CDCLVP1212 clock buffer distributes one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVPECL clock outputs (OUT0, OUT11) with minimum skew for clock distribution. The CDCLVP1212 can accept two clock sources into an input multiplexer. The inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.
The CDCLVP1212 is specifically designed for driving 50-Ω transmission lines. When driving the inputs in single-ended mode, the LVPECL bias voltage (VAC_REF) should be applied to the unused negative input terminal. However, for high-speed performance up to 2 GHz, differential mode is strongly recommended.