ADC12SJ800AAV
ActiveSINGLE-CHANNEL, 12-BIT, 800-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC) WITH JESD204C INTERFACE
ADC12SJ800AAV
ActiveSINGLE-CHANNEL, 12-BIT, 800-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC) WITH JESD204C INTERFACE
Description
General part information
ADC12SJ800 Series
ADC12xJ800 is a family of quad, dual and single channel, 12-bit, 800 MSPS analog-to-digital converters (ADC). Low power consumption, high sampling rate and 12-bit resolution makes the ADC12xJ800 ideally suited for a variety of multi-channel communications and test systems.
Full-power input bandwidth (-3dB) of 6GHz enables direct RF sampling of L-band and S-band.
A number of clocking features are included to relax system hardware requirements, such as an internal phase-locked loop (PLL) with integrated voltage-controlled oscillator (VCO) to generate the sampling clock. Four clock outputs are provided to clock the logic and SerDes of the FPGA or ASIC. A timestamp input and output is provided for pulsed systems.
Technical Specifications
Parameters and characteristics for this part
| Specification | ADC12SJ800AAV |
|---|---|
| Architecture | SAR, Pipelined |
| Configuration | ADC |
| Data Interface | JESD204B/C |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 count |
| Number of Bits | 12 bits |
| Number of Inputs | 1 |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | FCBGA, 144-FBGA |
| Package Length | 10 mm |
| Package Name | 144-FCBGA |
| Package Width | 10 mm |
| Ratio - ADC | 1 |
| Ratio - S/H | 0 |
| Sampling Rate (Per Second) | 800 MHz |
| Voltage - Supply, Analog (Range 1 Max) | 1.15 V |
| Voltage - Supply, Analog (Range 1 Min) | 1.05 V |
| Voltage - Supply, Analog (Range 2 Max) | 2 V |
| Voltage - Supply, Analog (Range 2 Min) | 1.8 V |
| Voltage - Supply, Digital (Max) | 1.15 V |
| Voltage - Supply, Digital (Min) | 1.05 V |
Pricing
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