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376-BGA-ZDU

TMS320DM6435ZDU7

NRND
Texas Instruments

IC DGTL MEDIA PROCESSOR 376-BGA

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376-BGA-ZDU

TMS320DM6435ZDU7

NRND
Texas Instruments

IC DGTL MEDIA PROCESSOR 376-BGA

Find alt

Description

General part information

TMS320 Series

The TMS320C672x is the next generation of Texas Instruments' C67x generation of high-performance 32-/64-bit floating-point digital signal processors. The TMS320C672x includes the TMS320C6727B, TMS320C6726B, TMS320C6722B, and TMS320C6720 devices.(1)

Enhanced C67x+ CPU. The C67x+ CPU is an enhanced version of the C67x CPU used on the C671x DSPs. It is compatible with the C67x CPU but offers significant improvements in speed, code density, and floating-point performance per clock cycle. At 350 MHz, the CPU is capable of a maximum performance of 2800 MIPS/2100 MFLOPS by executing up to eight instructions (six of which are floating-point instructions) in parallel each cycle. The CPU natively supports 32-bit fixed-point, 32-bit single-precision floating-point, and 64-bit double-precision floating-point arithmetic.

Efficient Memory System. The memory controller maps the large on-chip 256K-byte RAM and 384K-byte ROM as unified program/data memory. Development is simplified since there is no fixed division between program and data memory size as on some other devices.

Technical Specifications

Parameters and characteristics for this part

SpecificationTMS320DM6435ZDU7
Clock Rate (Frequency)700 MHz
InterfaceUART, McBSP, I2C, McASP, HPI, 10/100 Ethernet MAC
Mounting TypeSurface Mount
Non-Volatile Memory Size64 kB
Non-Volatile Memory TypeROM
On-Chip RAM240 kB
Operating Temperature (Max)90 °C
Operating Temperature (Min)0 °C
Package / Case376-BBGA Exposed Pad
Package Length23 mm
Package Name376-BGA
Package Width23 mm
TypeFixed Point
Voltage - Core (Option 1)1.05 V
Voltage - Core (Option 2)1.2 V
Voltage - I/O (Option 1)1.8 V
Voltage - I/O (Option 2)3.3 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

TMS320DM6435ZDU7 | Datasheet
Migrating from TMS320C64x to TMS320C64x+ (Rev. A)
TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. J)
TMS320C6000 Optimizing Compiler v 6.1 User's Guide (Rev. O)
Using the TMS320DM643x Bootloader (Rev. E)
TMS320DM643x Power Consumption Summary (Rev. C)
Implementing DDR2 PCB Layout on the TMS320DM643x DMSoC (Rev. A)
TMS320DM6437/35/33/31 DMP Silicon Errata (Revs. 1.3 1.2 1.1 & 1.0) (Rev. E)
Thermal Considerations for the DM64xx, DM64x, and C6000 Devices
TMS320DM643x DMP DDR2 Memory Controller User's Guide (Rev. C)
Overview of DaVinci™ TMS320DM643x Digital Media Portfolio (Rev. B)
TMS320DM643x DMP Host Port Interface (HPI) User's Guide (Rev. D)
5Vin DM643x Power using DC/DC Controllers and LDO
Plastic Ball Grid Array [PBGA] Application Note (Rev. B)
TMS320C64x+ Image/Video Processing Library Programmer's Reference
TMS320C64x+ DSP Big-Endian Library Programmer's Reference
Understanding the Davinci Preview Engine (Rev. A)
TMS320C64x+ DSP Image/Video Processing Library (v2.0) Programmer's Reference (Rev. A)
TMS320DM643x DMP DSP Subsystem Reference Guide (Rev. E)
TMS320DM643x DMP Enhanced DMA (EDMA) Controller User's Guide (Rev. A)
TMS320DM643x DMP Multichannel Buffered Serial Port (McBSP) User's Guide (Rev. C)
TMS320DM643x DMP VLYNQ Port User's Guide (Rev. B)
How to Use the VPBE and VPFE Driver on the TMS320DM643x Devices (Rev. A)
TMS320C6000 Programmer's Guide (Rev. K)
TMS320C64x+ DSP Little-Endian Library Programmer's Reference (Rev. B)
Introduction to TMS320C6000 DSP Optimization
TMS320DM643x Pin Multiplexing Utility
12Vin DM643x Power using Integrated-FET DC/DC Converters and LDO
Migrating from EDMA v2.0 to EDMA v3.0 TMS320C64X DSP (Rev. A)
TMS320DM643x DMP High-End CAN Controller (HECC) User's Guide (Rev. A)
TMS320C64x+ DSP Cache User's Guide (Rev. B)
TMS320C6000 Assembly Language Tools v 6.1 User's Guide (Rev. Q)
TMS320DM643x DMP Inter-Integrated Circuit (I2C) Module User's Guide (Rev. E)
TMS320DM643x DMP 64-Bit Timer User's Guide
TMS320DM6435 Digital Media Processor datasheet (Rev. C)
DaVinci Technology Background and Specifications (Rev. A)
Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)
DaVinci Technology - Digital Video Innovation Product Bulletin (Rev. D)
TMS320C64x+ DSP Megamodule Reference Guide (Rev. K)
TMS320DM643x DMP EMAC/MDIO User's Guide (Rev. C)
TMS320DM643x DMP Video Processing Front End (VPFE) User's Guide (Rev. D)
How to Use the EDMA3 Driver on a TMS320DM643x Device (Rev. A)
5Vin DM643x Power using a PMIC (Multi-output DC/DC Converter)
TMS320C6000 DSP TCP/IP Stack Software (Rev. C)
5Vin DM643x Power using Integrated-FET DC/DC Converters and LDO
TMS320DM643x DMP Multichannel Audio Serial Port (McASP) User's Guide (Rev. D)
TMS320DM643x DMP Pulse-Width Modulator (PWM) User's Guide (Rev. B)
TMS320DM643x DMP Asynchronous External Memory Interface (EMIF) UG (Rev. B)
TMS320DM643x DMP Peripherals Overview Reference Guide (Rev. A)
TMS320DM643x DMP Universal Asynchronous Receiver/Transmitter (UART) UG (Rev. C)
Understanding the Davinci Resizer (Rev. B)
Common Object File Format (COFF)
TMS320DM643x DMP General-Purpose Input/Output (GPIO) User's Guide (Rev. B)