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ADSP-21065LKSZ-264

ADSP-21065LKSZ-264

Obsolete
Analog Devices Inc./Maxim Integrated

LOW-COST SHARC, 66 MHZ, 198 MFLOPS, 3.3V, FLOATING POINT

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ADSP-21065LKSZ-264

ADSP-21065LKSZ-264

Obsolete
Analog Devices Inc./Maxim Integrated

LOW-COST SHARC, 66 MHZ, 198 MFLOPS, 3.3V, FLOATING POINT

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Description

General part information

ADSP-21065L Series

The ADSP-21065L is a general purpose, programmable 32-bit DSP that allows users to program with equal efficiency in both fixed-point or floating-point arithmetic. This programming flexibility combined with the high performance core and integrated peripherals make the ADSP-21065L an outstanding price/performance value for a broad base of consumer, communications, automotive, industrial and computer applications.The ADSP-21065L is code compatible with ADI's SHARC DSP family and as such customers have immediate access to software and hardware development tools from ADI and SHARC third parties.

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-21065LKSZ-264
Clock Rate (Frequency)60 MHz
InterfaceHost Interface, Serial Port
Mounting TypeSurface Mount
Non-Volatile Memory TypeExternal
On-Chip RAM64 kB
Operating Temperature (Max)85 °C
Operating Temperature (Min)0 °C
Package / Case208-BFQFP
Package Length28 mm
Package Name208-MQFP
Package Width28 mm
TypeFloating Point
Voltage - Core3.3 V
Voltage - I/O3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

An Almost Pure DDS Sine Wave Tone Generator
ADSP-21065LKSZ-264 | Datasheet
EE-62: Accessing Short Word Memory In C
EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)
EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev.1)
EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev.2)
EE-42: C-Programs on the ADSP-2106x
ADSP-21061, 21065L and the 21160M EZ-KIT Lite®Installation Procedure (Rev.3.1)
EE-109: ADSP2106x : Using 2106x SPORT's as Timers
ADSP-21065L-EP: Enhanced Product Data Sheet (Rev. B)
EE-116: SHARC Shortword DMA
EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs
EE-37: How to Interface an LCD to the 21xx and 2106x Family DSP's
ADSP-21065L User's Manual (Rev.2.0)
EE-128: DSP in C++: Calling Assembly Class Member Functions From C++
Summit-ICE PCI Emulator Hardware Installation Guide (Rev.4)
EE-285: Migrating from ADSP-21065L to ADSP-21375 SHARC® Processors (Rev.2)
TN: Interfacing I2S Compatible Audio Devices to the ADSP-21065L
EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)
Interfacing the ADSP21065L SHARC DSP to the AD1819A AC-97 Soundport Codec
EE-45: Using the ADSP-2106x/21020 EZ-ICE DBWIN Utility
EE-253: Power Bypass Decoupling of SHARC® Processors (Rev.1)
EE-247: Interfacing AD7676 ADCs to ADSP-21065L SHARC® Processors (Rev.1)
EE-47: ADSP-2106x Link Ports - Maximum Throughput
EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)
EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev.3)
EE-241: SHARC® DSPs to TigerSHARC® Processors Code Porting Guide (Rev.1)
ADSP-21065L SHARC DSP 32-Bit Floating Point Performance Product Highlight
EE-280: In-Circuit Flash Programming on ADSP-2106x SHARC® Processors (Rev.2)
ADSP-21065L Technical Reference (Rev.2.0)
Package Drawing - 208-Lead MQFP (28mm x 28mm x 3.4mm)
TN: Using the Low Cost, High Performance ADSP21065L DSP for Digital Audio Applications (Rev.1)
EE-74: Analog Devices Serial Port Development and Troubleshooting Guide
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)
EE-305: Designing and Debugging Systems with SHARC Processors (Rev.1)
EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev.3)
EE-132: Placing C Code and Data Modules in SHARC memory using VisualDSP++™
EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev.1)
EE-103: Performing Level Conversion Between 5v and 3.3v IC's
SHARC Processor Family
EE-70: ADSP-2106x SPORT DTx pins: Is There Potential MCM Data Contention Between Different SHARCs
EZ-KIT Lite for ADSP-21065L SHARC DSP Product Highlight
EE-110: A Quick Primer on ELF and DWARF File Formats
EE-141: Benchmarking C Code on the ADSP-2106x and the ADSP-2116x Family of DSPs
EE-107: ADSP-21065L EPROM Booting
EE-244: Interfacing Gated Clocks to ADSP-21065L SHARC® Processors (Rev.1)
ADSP-21065L Anomaly List for Revision 0.0, 0.1, 0.2, 0.3
EE-98: Using External Bus Arbitration to Group More Than Two ADSP-21065L into a Multiprocessing Cluster
Apex-ICE USB Emulator Hardware Installation Guide (Rev.6.0)
EE-127: The ADSP-21065L On-chip SDRAM Controller (Rev.1)
EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)
EE-86: Interfacing SHARC 2106x DSPs to PLX 9080 PCI Bridge Chips
EE-46: SHARC Internal Power Measurements
EE-219: Connecting Character LCD Panels to ADSP-21262 SHARC® DSPs (Rev.1)
EE-166: ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0
EE-332: Cycle Counting and Profiling (Rev.2)
EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)
EE-104: Setting Up Streams with the VisualDSP Debugger
EE-85: Recommended Handling of Unused SHARC Pins