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ADSP-21065LKCAZ264

ADSP-21065LKCAZ264

Obsolete
Analog Devices Inc./Maxim Integrated

LOW-COST SHARC, 66 MHZ, 198 MFLOPS, 3.3V, FLOATING POINT

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ADSP-21065LKCAZ264

ADSP-21065LKCAZ264

Obsolete
Analog Devices Inc./Maxim Integrated

LOW-COST SHARC, 66 MHZ, 198 MFLOPS, 3.3V, FLOATING POINT

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Description

General part information

ADSP-21065L Series

The ADSP-21065L is a general purpose, programmable 32-bit DSP that allows users to program with equal efficiency in both fixed-point or floating-point arithmetic. This programming flexibility combined with the high performance core and integrated peripherals make the ADSP-21065L an outstanding price/performance value for a broad base of consumer, communications, automotive, industrial and computer applications.The ADSP-21065L is code compatible with ADI's SHARC DSP family and as such customers have immediate access to software and hardware development tools from ADI and SHARC third parties.

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-21065LKCAZ264
Clock Rate (Frequency)60 MHz
InterfaceHost Interface, Serial Port
Mounting TypeSurface Mount
Non-Volatile Memory TypeExternal
On-Chip RAM64 kB
Operating Temperature (Max)85 °C
Operating Temperature (Min)0 °C
Package / Case196-BGA, CSPBGA
Package Length15 mm
Package Name196-CSPBGA
Package Width15 mm
TypeFloating Point
Voltage - Core3.3 V
Voltage - I/O3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

ADSP-21065LKCAZ264 | Datasheet
EE-62: Accessing Short Word Memory In C
EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev.3)
EE-98: Using External Bus Arbitration to Group More Than Two ADSP-21065L into a Multiprocessing Cluster
EE-247: Interfacing AD7676 ADCs to ADSP-21065L SHARC® Processors (Rev.1)
EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)
EE-37: How to Interface an LCD to the 21xx and 2106x Family DSP's
EE-85: Recommended Handling of Unused SHARC Pins
EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)
EE-241: SHARC® DSPs to TigerSHARC® Processors Code Porting Guide (Rev.1)
ADSP-21061, 21065L and the 21160M EZ-KIT Lite®Installation Procedure (Rev.3.1)
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)
EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev.2)
EE-141: Benchmarking C Code on the ADSP-2106x and the ADSP-2116x Family of DSPs
TN: Interfacing I2S Compatible Audio Devices to the ADSP-21065L
EE-132: Placing C Code and Data Modules in SHARC memory using VisualDSP++™
SHARC Processor Family
EE-46: SHARC Internal Power Measurements
Summit-ICE PCI Emulator Hardware Installation Guide (Rev.4)
EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev.1)
EE-45: Using the ADSP-2106x/21020 EZ-ICE DBWIN Utility
EE-104: Setting Up Streams with the VisualDSP Debugger
EE-70: ADSP-2106x SPORT DTx pins: Is There Potential MCM Data Contention Between Different SHARCs
EE-127: The ADSP-21065L On-chip SDRAM Controller (Rev.1)
EE-253: Power Bypass Decoupling of SHARC® Processors (Rev.1)
Package Drawing - 196-Ball CSPBGA (15mm x 15mm x 1.7mm)
EE-166: ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0
ADSP-21065L-EP: Enhanced Product Data Sheet (Rev. B)
EZ-KIT Lite for ADSP-21065L SHARC DSP Product Highlight
EE-47: ADSP-2106x Link Ports - Maximum Throughput
ADSP-21065L User's Manual (Rev.2.0)
EE-86: Interfacing SHARC 2106x DSPs to PLX 9080 PCI Bridge Chips
EE-109: ADSP2106x : Using 2106x SPORT's as Timers
EE-107: ADSP-21065L EPROM Booting
EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)
EE-74: Analog Devices Serial Port Development and Troubleshooting Guide
EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)
EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs
EE-128: DSP in C++: Calling Assembly Class Member Functions From C++
EE-116: SHARC Shortword DMA
ADSP-21065L SHARC DSP 32-Bit Floating Point Performance Product Highlight
EE-42: C-Programs on the ADSP-2106x
EE-103: Performing Level Conversion Between 5v and 3.3v IC's
EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev.1)
ADSP-21065L Anomaly List for Revision 0.0, 0.1, 0.2, 0.3
EE-285: Migrating from ADSP-21065L to ADSP-21375 SHARC® Processors (Rev.2)
EE-305: Designing and Debugging Systems with SHARC Processors (Rev.1)
EE-280: In-Circuit Flash Programming on ADSP-2106x SHARC® Processors (Rev.2)
EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev.3)
EE-332: Cycle Counting and Profiling (Rev.2)
EE-244: Interfacing Gated Clocks to ADSP-21065L SHARC® Processors (Rev.1)
EE-110: A Quick Primer on ELF and DWARF File Formats
ADSP-21065L Technical Reference (Rev.2.0)
EE-219: Connecting Character LCD Panels to ADSP-21262 SHARC® DSPs (Rev.1)
TN: Using the Low Cost, High Performance ADSP21065L DSP for Digital Audio Applications (Rev.1)
Interfacing the ADSP21065L SHARC DSP to the AD1819A AC-97 Soundport Codec
EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)
Apex-ICE USB Emulator Hardware Installation Guide (Rev.6.0)