CDCLVD2108RGZR

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Texas Instruments

LOW JITTER, DUAL 1:8 UNIVERSAL-TO-LVDS BUFFER

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CDCLVD2108RGZR

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Texas Instruments

LOW JITTER, DUAL 1:8 UNIVERSAL-TO-LVDS BUFFER

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Description Specifications Series Pricing CAD Documents

Description

General part information

CDCLVD2108 Series

The CDCLVD2108 clock buffer distributes two clock inputs (IN0, IN1) to a total of 16 pairs of differential LVDS clock outputs (OUT0, OUT15). Each buffer block consists of one input and 8 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.

The CDCLVD2108 is specifically designed for driving 50-transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.

Using the control pin (EN) outputs can be either disabled or enabled. If the EN pin is left open all outputs are active, if switched to a logical "0" all outputs are disabled (static logical 0), if switched to a logical "1", OUT (8..15) are switched off and OUT (0..7) are active. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.

Technical Specifications

Parameters and characteristics for this part

Specification	CDCLVD2108RGZR

Differential Input	Yes
Differential Output	Yes
Frequency - Max	800 MHz
Input	LVPECL, LVDS, LVCMOS
Input Ratio	1
Mounting Type	Surface Mount
Number of Circuits	2
Operating Temperature (Max)	85 °C
Operating Temperature (Min)	-40 °C
Output	LVDS
Output Ratio	8
Package / Case	48-VFQFN Exposed Pad
Package Length	7 mm
Package Name	48-VQFN
Package Width	7 mm
Type	Fanout Buffer (Distribution)
Voltage - Supply (Maximum)	2.625 V
Voltage - Supply (Minimum)	2.375 V

CDCLVD2108 Series

Part	Output	Mounting Type	Input	Input Ratio	Output Ratio	Frequency - Max	Differential Input	Differential Output	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Operating Temperature (Min)	Operating Temperature (Max)	Package Length	Package Name	Package Width	Type	Package / Case	Number of Circuits
Texas Instruments CDCLVD2108RGZT	LVDS	Surface Mount	LVCMOS LVDS LVPECL	1	8	800 MHz	Yes	Yes	2.625 V	2.375 V	-40 °C	85 °C	7 mm	48-VQFN	7 mm	Fanout Buffer (Distribution)	48-VFQFN Exposed Pad	2
Texas Instruments CDCLVD2108RGZR	LVDS	Surface Mount	LVCMOS LVDS LVPECL	1	8	800 MHz	Yes	Yes	2.625 V	2.375 V	-40 °C	85 °C	7 mm	48-VQFN	7 mm	Fanout Buffer (Distribution)	48-VFQFN Exposed Pad	2

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

Dual 1:8 Low Additive Jitter LVDS Buffer datasheet (Rev. C)