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OMFCBGA (ZDK)

TMS320C6412AGDK5

Obsolete
Texas Instruments

C64X FIXED POINT DSP- UP TO 720MHZ, MCBSP, MCASP, I2CC, ETHERNET

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OMFCBGA (ZDK)

TMS320C6412AGDK5

Obsolete
Texas Instruments

C64X FIXED POINT DSP- UP TO 720MHZ, MCBSP, MCASP, I2CC, ETHERNET

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Description

General part information

TMS320 Series

The TMS320C672x is the next generation of Texas Instruments' C67x generation of high-performance 32-/64-bit floating-point digital signal processors. The TMS320C672x includes the TMS320C6727B, TMS320C6726B, TMS320C6722B, and TMS320C6720 devices.(1)

Enhanced C67x+ CPU. The C67x+ CPU is an enhanced version of the C67x CPU used on the C671x DSPs. It is compatible with the C67x CPU but offers significant improvements in speed, code density, and floating-point performance per clock cycle. At 350 MHz, the CPU is capable of a maximum performance of 2800 MIPS/2100 MFLOPS by executing up to eight instructions (six of which are floating-point instructions) in parallel each cycle. The CPU natively supports 32-bit fixed-point, 32-bit single-precision floating-point, and 64-bit double-precision floating-point arithmetic.

Efficient Memory System. The memory controller maps the large on-chip 256K-byte RAM and 384K-byte ROM as unified program/data memory. Development is simplified since there is no fixed division between program and data memory size as on some other devices.

Technical Specifications

Parameters and characteristics for this part

SpecificationTMS320C6412AGDK5
Clock Rate (Frequency)500 MHz
InterfacePCI, McBSP, Host Interface
Mounting TypeSurface Mount
Non-Volatile Memory TypeExternal
On-Chip RAM288 kB
Operating Temperature (Max)90 °C
Operating Temperature (Min)0 °C
Package / Case548-BFBGA, FCBGA
Package Length23 mm
Package Name548-FC/CSP
Package Width23 mm
TypeFixed Point
Voltage - Core1.4 V
Voltage - I/O3.3 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C)
TMS320C6000 DSP Enhanced Direct Memory Access (EDMA) Controller Reference Guide (Rev. C)
TMS320C6000 DSP Host-Post Interface (HPI) Reference Guide (Rev. C)
Using a TMS320C6000 McBSP for Data Packing (Rev. A)
TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A)
TMS320C6000 u-Law and a-Law Companding with Software or the McBSP
TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A)
Use and Handling of Semiconductor Packages With ENIG Pad Finishes
TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. J)
TMS320C6000 DSP Cache User's Guide (Rev. A)
TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D)
TMS320C6000 McBSP: Interface to SPI ROM (Rev. C)
TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A)
TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E)
TMS320C6000 Chip Support Library API Reference Guide (Rev. J)
TMS320C6000 Host Port to MC68360 Interface (Rev. A)
TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B)
TMS320C64x EDMA Architecture
General Guide to Implement Logarithmic and Exponential Operations on Fixed-Point
TMS320C6000 DSP Inter-Integrated Circuit (I2C) Module Reference Guide (Rev. D)
Migrating from TMS320C64x to TMS320C64x+ (Rev. A)
TMS320C6000 DSP TCP/IP Stack Software (Rev. C)
Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A)
TMS320C6000 DSP Peripheral Component Interconnect (PCI) Reference Guide (Rev. C)
TMS320C6412 Power Consumption Summary (Rev. E)
TMS320C6000 McBSP as a TDM Highway (Rev. A)
TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)
TMS320C6412 Hardware Designer's Resource Guide (Rev. A)
TMS320C6000 McBSP Initialization (Rev. C)
TMS320C6000 Host Port to MPC860 Interface (Rev. A)
TMS320C6000 McBSP: I2S Interface
TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C)
TMS320C64x DSP Two-Level Internal Memory Reference Guide (Rev. C)
Introduction to TMS320C6000 DSP Optimization
TMS320C64x DSP Peripheral Component Interconnect (PCI) Performance
TMS320C6000 Board Design: Considerations for Debug (Rev. C)
TMS320C6000 DSP EMAC/MDIO Module Reference Guide (Rev. A)
TMS320C6000 DSP General-Purpose Input/Output (GPIO) Reference Guide (Rev. A)
Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A)
Emulation and Trace Headers Technical Reference Manual (Rev. I)
Circular Buffering on TMS320C6000 (Rev. A)
TMS320C6000 EMIF to External Flash Memory (Rev. A)
TMS320C6000 System Clock Circuit Example (Rev. A)
TMS320C6412 Fixed-Point Digital Signal Processor datasheet (Rev. J)
TMS320C6000 Enhanced DMA: Example Applications (Rev. A)
Cache Usage in High-Performance DSP Applications with the TMS320C64x
Thermal Considerations for the DM64xx, DM64x, and C6000 Devices
TMS320C64x EDMA Performance Data
TMS320C6000 C Compiler: C Implementation of Intrinsics
TMS320C6000 EDMA IO Scheduling and Performance
TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A)
How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A)
TMS320C64x Technical Overview (Rev. B)
Using IBIS Models for Timing Analysis (Rev. A)
TMS320C6000 McBSP: IOM-2 Interface (Rev. A)
TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B)
TMS320C6000 DSP Designing for JTAG Emulation Reference Guide
TMS320C6412 DSP Silicon Errata (Silicon Revisions 2.0, 1.2, 1.1, 1.0) (Rev. J)
TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. Q)
TMS320C6000 Board Design for JTAG (Rev. C)
TMS320C64x DSP Host Port Interface (HPI) Performance
TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. G)
TMS320C6412AGDK5 | Datasheet