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SN74LVC2G100PWR

SN74LVC2G100PWR

Active
Texas Instruments

TWO-CHANNEL 1.1V-TO-3.6V CONFIGURABLE GATE WITH FLIP-FLOP AND SCHMITT-TRIGGER INPUTS

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SN74LVC2G100PWR

SN74LVC2G100PWR

Active
Texas Instruments

TWO-CHANNEL 1.1V-TO-3.6V CONFIGURABLE GATE WITH FLIP-FLOP AND SCHMITT-TRIGGER INPUTS

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Description

General part information

SN74LVC2G100 Series

The SN74LVC2G100 is a dual, sequential, configurable multiple function device with Schmitt Trigger inputs. Sixteen patterns of a 4-bit input determines the output state. The output state serves as the input to a D-Flip Flop, which is transferred to the Q output on the positive going CLK edge. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and non-inverter.

The SN74LVC2G100 is a dual, sequential, configurable multiple function device with Schmitt Trigger inputs. Sixteen patterns of a 4-bit input determines the output state. The output state serves as the input to a D-Flip Flop, which is transferred to the Q output on the positive going CLK edge. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and non-inverter.

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC2G100PWR
Current - Output High24 mA
Current - Output Low24 mA
Logic TypeConfigurable Multiple Function
Mounting TypeSurface Mount
Number of Circuits1
Number of Inputs3
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Output TypeSingle-Ended
Package Length0.173 in
Package Name16-TSSOP
Package Width4.4 mm
Schmitt Trigger InputYes
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)1.1 V

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

SN74LVC2G100PWR | Datasheet
Live Insertion
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
TI IBIS File Creation, Validation, and Distribution Processes
Standard Linear & Logic for PCs, Servers & Motherboards
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
LVC Characterization Information
How to Select Little Logic (Rev. A)
Logic Guide (Rev. AB)
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Implications of Slow or Floating CMOS Inputs (Rev. E)
Little Logic Guide 2018 (Rev. G)
Design Summary for WCSP Little Logic (Rev. B)
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Input and Output Characteristics of Digital Integrated Circuits
Utilizing Configurable Logic in System Design
LOGIC Pocket Data Book (Rev. B)
Signal Switch Data Book (Rev. A)
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
Understanding Advanced Bus-Interface Products Design Guide
SN74LVC2G100 Dual Configurable Multiple-Function Gates with Flip-Flop datasheet
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Texas Instruments Little Logic Application Report
Low-Voltage Logic (LVC) Designer's Guide
CMOS Power Consumption and CPD Calculation (Rev. B)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
Selecting the Right Level Translation Solution (Rev. A)