DS99R106SQ/NOPB
Active3-MHZ TO 40-MHZ DC-BALANCED 24-BIT LVDS DESERIALIZER
DS99R106SQ/NOPB
Active3-MHZ TO 40-MHZ DC-BALANCED 24-BIT LVDS DESERIALIZER
Description
General part information
DS99R106 Series
The DS99R105/DS99R106 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.
The DS99R105/DS99R106 incorporates LVDS signaling on the high-speed I/O. LVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. By optimizing the serializer output edge rate for the operating frequency range EMI is further reduced.
In addition the device features pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.
Technical Specifications
Parameters and characteristics for this part
| Specification | DS99R106SQ/NOPB |
|---|---|
| Data Rate | 960 Mbps |
| Function | Deserializer |
| Input Type | FPD-Link II, LVDS |
| Mounting Type | Surface Mount |
| Number of Inputs | 1 |
| Number of Outputs | 24 |
| Operating Temperature (Max) | 70 °C |
| Operating Temperature (Min) | 0 °C |
| Output Type | LVCMOS |
| Package / Case | 48-WFQFN Exposed Pad |
| Package Length | 7 mm |
| Package Name | 48-WQFN |
| Package Width | 7 mm |
| Voltage - Supply (Maximum) | 3.6 V |
| Voltage - Supply (Minimum) | 3 V |
Pricing
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