
PMDXB950UPEZ
ActiveNexperia USA Inc.
TRANSISTOR MOSFET ARRAY DUAL P-CH 20V 0.5A 8-PIN DFN1010B-6 T/R

PMDXB950UPEZ
ActiveNexperia USA Inc.
TRANSISTOR MOSFET ARRAY DUAL P-CH 20V 0.5A 8-PIN DFN1010B-6 T/R
Description
General part information
PMDXB950UPE Series
Dual P-channel enhancement mode Field-Effect Transistor (FET) in a leadless ultra small DFN1010B-6 (SOT1216) Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology.
Technical Specifications
Parameters and characteristics for this part
| Specification | PMDXB950UPEZ |
|---|---|
| Channel Count | 2 |
| Configuration | P-Channel |
| Configuration - Features | Dual |
| Current - Continuous Drain (Id) | 500 mA |
| Drain to Source Voltage (Vdss) | 20 V |
| FET Feature | Logic Level Gate |
| Gate Charge (Max) | 2.1 nC |
| Input Capacitance (Ciss) (Max) | 43 pF |
| Mounting Type | Surface Mount |
| Operating Temperature (Max) | 150 °C |
| Operating Temperature (Min) | -55 °C |
| Package / Case | 6-XFDFN Exposed Pad |
| Package Name | DFN1010B-6 |
| Power - Max | 265 mW |
| Rds On (Max) | 1.4 Ohm |
| Technology | MOSFET (Metal Oxide) |
| Vgs(th) (Max) | 950 mV |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
Datasheet
DFN1010B-6; Reel pack for SMD, 7''; Q2/T3 product orientation
LFPAK MOSFET thermal design guide - Part 2
Reflow soldering profile
RC Thermal Models
Nexperia package poster
Using power MOSFETs in parallel
plastic, thermal enhanced ultra thin small outline package; no leads; 6 terminals; 0.75 mm pitch; 1.1 mm x 1 mm x 0.37 mm body
Questions about package outline drawings
LFPAK MOSFET thermal design guide, Chinese version
Power MOSFET single-shot and repetitive avalanche ruggedness rating
Thermal performance of DFN packages
plastic, leadless thermal enhanced ultra thin small outline package; 6 terminals; 0.35 mm pitch; 1.1 mm x 1 mm x 0.37 mm body
Power MOSFET frequently asked questions and answers
Low temperature soldering, application study