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ADSP-21061LKBZ-160

ADSP-21061LKBZ-160

Unknown
Analog Devices Inc./Maxim Integrated

SHARC, 44MHZ, 150 MFLOPS, 3.3V, FLOATING POINT

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Description

General part information

ADSP-21061L Series

The ADSP-21061L is the newest member of the powerful SHARC®family of floating point processors. The SHARC®are signal processing microcomputers that offer new capabilities and levels of integration and performance. The ADSP-21061L is the low power (3.3 volt) version of the ADSP-21061. The ADSP-21061L is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061L combines the ADSP-21000 DSP core with a dual-ported on-chip SRAM and an I/O processor with a dedicated I/O bus to form a complete system-in-a-chip.Fabricated in a high-speed, low-power CMOS process, the ADSP-21061L has a 25 ns instruction cycle time operating at 40 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.The ADSP-21061L SHARC combines a high-performance floating-point DSP core with integrated, on-chip system features, including a 1 Mbit SRAM memory, host processor interface, DMA controller, serial ports and parallel bus connectivity for glueless DSP multiprocessing.

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-21061LKBZ-160
Clock Rate (Frequency)40 MHz
InterfaceSynchronous Serial Port (SSP)
Mounting TypeSurface Mount
Non-Volatile Memory TypeExternal
On-Chip RAM128 kB
Operating Temperature (Max)85 °C
Operating Temperature (Min)0 °C
Package / Case225-BBGA
Package Length23 mm
Package Name225-PBGA
Package Width23 mm
TypeFloating Point
Voltage - Core3.3 V
Voltage - I/O3.3 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev.1)
ADSP-21061/ADSP-21061L: Commercial Grade SHARC Family DSP Microcomputer Data Sheet (Rev.D)
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)
EE-141: Benchmarking C Code on the ADSP-2106x and the ADSP-2116x Family of DSPs
EE-305: Designing and Debugging Systems with SHARC Processors (Rev.1)
EE-37: How to Interface an LCD to the 21xx and 2106x Family DSP's
EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev.3)
Summit-ICE PCI Emulator Hardware Installation Guide (Rev.4)
EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs
EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)
EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)
EE-47: ADSP-2106x Link Ports - Maximum Throughput
EE-132: Placing C Code and Data Modules in SHARC memory using VisualDSP++™
EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)
EE-104: Setting Up Streams with the VisualDSP Debugger
EE-70: ADSP-2106x SPORT DTx pins: Is There Potential MCM Data Contention Between Different SHARCs
EE-45: Using the ADSP-2106x/21020 EZ-ICE DBWIN Utility
EE-253: Power Bypass Decoupling of SHARC® Processors (Rev.1)
EE-62: Accessing Short Word Memory In C
EE-128: DSP in C++: Calling Assembly Class Member Functions From C++
EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)
EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev.1)
EE-86: Interfacing SHARC 2106x DSPs to PLX 9080 PCI Bridge Chips
EE-103: Performing Level Conversion Between 5v and 3.3v IC's
Apex-ICE USB Emulator Hardware Installation Guide (Rev.6.0)
EE-110: A Quick Primer on ELF and DWARF File Formats
EE-241: SHARC® DSPs to TigerSHARC® Processors Code Porting Guide (Rev.1)
EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev.2)
ADSP-21061/ADSP-21061L SHARC Anomaly List for Revision 0.1 (Rev.A)
EE-116: SHARC Shortword DMA
ADSP-2106x SHARC®User's Manual (Rev.2.1)
EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev.3)
EE-166: ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0
EE-74: Analog Devices Serial Port Development and Troubleshooting Guide
EE-109: ADSP2106x : Using 2106x SPORT's as Timers
EE-280: In-Circuit Flash Programming on ADSP-2106x SHARC® Processors (Rev.2)
EE-46: SHARC Internal Power Measurements
EE-85: Recommended Handling of Unused SHARC Pins
Package Drawing - 225-Ball PBGA (23mm x 20mm)
EE-42: C-Programs on the ADSP-2106x
EE-332: Cycle Counting and Profiling (Rev.2)
EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)