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SN74LVC1G00DSFR - 6-SON

SN74LVC1G00DSFR

Active
Texas Instruments

SINGLE 2-INPUT, 1.65-V TO 5.5-V NAND GATE

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SN74LVC1G00DSFR - 6-SON

SN74LVC1G00DSFR

Active
Texas Instruments

SINGLE 2-INPUT, 1.65-V TO 5.5-V NAND GATE

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationSN74LVC1G00DSFR74LVC1G00 Series
--
Current - Output High, Low [custom]32 mA32 mA
Current - Output High, Low [custom]32 mA32 mA
Current - Quiescent (Max) [Max]10 µA10 µA
Input Logic Level - High [Max]2 V2 V
Input Logic Level - High [Min]1.7 V1.7 V
Input Logic Level - Low [Max]0.8 V0.8 V
Input Logic Level - Low [Min]0.7 V0.7 V
Logic TypeNAND GateNAND Gate
Max Propagation Delay @ V, Max CL4.3 ns4 - 5 ns
Mounting TypeSurface MountSurface Mount
Number of Circuits11
Number of Inputs22
Operating Temperature [Max]125 °C85 - 125 °C
Operating Temperature [Min]-40 °C-55 - -40 °C
Package / Case6-XFDFN6-UFDFN, 5-TSSOP, SOT-353, SC-70-5, SOT-753, SC-74A, DSBGA, 5-XFBGA, 4-XFDFN Exposed Pad, 6-XFDFN, SOT-553
Supplier Device Package6-SON (1x1)6-SON, SC-70-5, SOT-23-5, 5-DSBGA (1.4x0.9), 4-X2SON, 6-SON (1x1), SOT-5
Supplier Device Package-0.8 - 1
Supplier Device Package-0.8 - 1.45
Voltage - Supply [Max]5.5 V5.5 V
Voltage - Supply [Min]1.65 V1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

74LVC1G00 Series

SINGLE 2-INPUT, 1.65-V TO 5.5-V NAND GATE

PartInput Logic Level - Low [Max]Input Logic Level - Low [Min]Logic TypeInput Logic Level - High [Min]Input Logic Level - High [Max]Package / CaseVoltage - Supply [Max]Voltage - Supply [Min]Number of InputsOperating Temperature [Max]Operating Temperature [Min]Current - Output High, Low [custom]Current - Output High, Low [custom]Supplier Device Package [y]Supplier Device Package [x]Supplier Device PackageMax Propagation Delay @ V, Max CLMounting TypeCurrent - Quiescent (Max) [Max]Number of Circuits
Texas Instruments
SN74LVC1G00DRY2
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
6-UFDFN
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
1
1.45
6-SON
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DCKR-P
NAND Gate IC 1 Channel SC-70-5
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SC-70-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DCKT
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SC-70-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DBV3
IC Channel
Texas Instruments
SN74LVC1G00DBVTG4
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
SC-74A, SOT-753
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SOT-23-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00YEAR
NAND Gate IC 1 Channel 5-DSBGA (1.4x0.9)
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-XFBGA, DSBGA
5.5 V
1.65 V
2
85 °C
-40 °C
32 mA
32 mA
5-DSBGA (1.4x0.9)
4 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DPWR
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
4-XFDFN Exposed Pad
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
0.8
0.8
4-X2SON
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00YZPR
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-XFBGA, DSBGA
5.5 V
1.65 V
2
85 °C
-40 °C
32 mA
32 mA
5-DSBGA (1.4x0.9)
4 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00IDCKREP
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
85 °C
-40 °C
32 mA
32 mA
SC-70-5
4 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DBVT
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
SC-74A, SOT-753
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SOT-23-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00MDCKREP
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-55 °C
32 mA
32 mA
SC-70-5
5 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DBVTE4
NAND Gate IC 1 Channel SOT-23-5
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
SC-74A, SOT-753
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SOT-23-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DSF2
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
6-XFDFN
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
6-SON (1x1)
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DCKTG4
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SC-70-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DSFR
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
6-XFDFN
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
6-SON (1x1)
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00YEPR
NAND Gate IC 1 Channel 5-DSBGA (1.4x0.9)
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-XFBGA, DSBGA
5.5 V
1.65 V
2
85 °C
-40 °C
32 mA
32 mA
5-DSBGA (1.4x0.9)
4 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DRLR
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
SOT-553
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SOT-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DCKTE4
NAND Gate IC 1 Channel SC-70-5
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SC-70-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00MDBVREP
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
SC-74A, SOT-753
5.5 V
1.65 V
2
125 °C
-55 °C
32 mA
32 mA
SOT-23-5
5 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00YZAR
NAND Gate IC 1 Channel 5-DSBGA (1.4x0.9)
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-XFBGA, DSBGA
5.5 V
1.65 V
2
85 °C
-40 °C
32 mA
32 mA
5-DSBGA (1.4x0.9)
4 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DBVRG4
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
SC-74A, SOT-753
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SOT-23-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DCKJ
NAND Gate IC 1 Channel SC-70-5
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SC-70-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DCKR
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SC-70-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DBVRE4
NAND Gate IC 1 Channel SOT-23-5
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
SC-74A, SOT-753
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SOT-23-5
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DRYR
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm. This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range. The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
6-UFDFN
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
1
1.45
6-SON
4.3 ns
Surface Mount
10 µA
1
Texas Instruments
SN74LVC1G00DCKRE4
NAND Gate IC 1 Channel SC-70-5
0.8 V
0.7 V
NAND Gate
1.7 V
2 V
5-TSSOP, SC-70-5, SOT-353
5.5 V
1.65 V
2
125 °C
-40 °C
32 mA
32 mA
SC-70-5
4.3 ns
Surface Mount
10 µA
1

Description

General part information

74LVC1G00 Series

This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range.

Documents

Technical documentation and resources

Signal Switch Data Book (Rev. A)

User guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

SN74LVC1G00 Single 2-Input Positive-NAND Gate datasheet (Rev. AB)

Data sheet

Understanding Advanced Bus-Interface Products Design Guide

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

How to Select Little Logic (Rev. A)

Application note

Designing and Manufacturing with TI's X2SON Packages

Application note

Logic Guide (Rev. AB)

Selection guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

The Davies Sinusoidal Generator

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Texas Instruments Little Logic Application Report

Application note

LVC Characterization Information

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Input and Output Characteristics of Digital Integrated Circuits

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Live Insertion

Application note