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Description

General part information

74FCT825 Series

This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT825T is an 8-bit buffered register with all the CY74FCT823T controls, plus multiple enables (OE\1, OE\2, OE\3) to allow multiuser control of the interface, e.g., CS\, DMA, and RD/WR\. This device is ideal for use as an output port requiring high IOL/IOH.

This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Technical Specifications

Parameters and characteristics for this part

Specification74FCT825ASC
Current - Output High32 mA
Current - Output Low48 mA
Current - Quiescent (Iq)1.5 mA
FunctionMaster Reset
Input Capacitance6 pF
Max CL300 pF
Max Propagation Delay20 ns
Mounting TypeSurface Mount
Number of Bits per Element8 bits
Number of Elements1
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
Output TypeTri-State, Non-Inverted
Package Length0.295 in
Package Name24-SOIC
Package Width7.5 mm
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply (Maximum)5.25 V
Voltage - Supply (Minimum)4.75 V

Pricing

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