
74FCT825ASC
ObsoleteBUS DRIVER, FCT SERIES

74FCT825ASC
ObsoleteBUS DRIVER, FCT SERIES
Description
General part information
74FCT825 Series
This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT825T is an 8-bit buffered register with all the CY74FCT823T controls, plus multiple enables (OE\1, OE\2, OE\3) to allow multiuser control of the interface, e.g., CS\, DMA, and RD/WR\. This device is ideal for use as an output port requiring high IOL/IOH.
This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Technical Specifications
Parameters and characteristics for this part
| Specification | 74FCT825ASC |
|---|---|
| Current - Output High | 32 mA |
| Current - Output Low | 48 mA |
| Current - Quiescent (Iq) | 1.5 mA |
| Function | Master Reset |
| Input Capacitance | 6 pF |
| Max CL | 300 pF |
| Max Propagation Delay | 20 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 bits |
| Number of Elements | 1 |
| Operating Temperature (Max) | 70 °C |
| Operating Temperature (Min) | 0 °C |
| Output Type | Tri-State, Non-Inverted |
| Package Length | 0.295 in |
| Package Name | 24-SOIC |
| Package Width | 7.5 mm |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply (Maximum) | 5.25 V |
| Voltage - Supply (Minimum) | 4.75 V |
Pricing
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