SN74AHCT14QDRG4Q1
ActiveTexas Instruments
INVERTER SCHMITT TRIGGER 6-ELEMENT CMOS AUTOMOTIVE AEC-Q100 14-PIN SOIC T/R
SN74AHCT14QDRG4Q1
ActiveTexas Instruments
INVERTER SCHMITT TRIGGER 6-ELEMENT CMOS AUTOMOTIVE AEC-Q100 14-PIN SOIC T/R
Description
General part information
SN74AHCT14Q-Q1 Series
The SN74AHCT14Q-Q1 contains six independent inverters. This device performs the Boolean function Y = A.
The SN74AHCT14Q-Q1 contains six independent inverters. This device performs the Boolean function Y = A.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74AHCT14QDRG4Q1 |
|---|---|
| Current - Output High | 8 mA |
| Current - Output Low | 8 mA |
| Current - Quiescent (Max) | 2 µA |
| Features | Schmitt Trigger |
| Grade | Automotive |
| Input Logic Level - High (Max) | 2.1 V |
| Input Logic Level - High (Min) | 1.9 V |
| Input Logic Level - Low (Max) | 0.6 V |
| Input Logic Level - Low (Min) | 0.5 V |
| Logic Type | Inverter |
| Max CL | 50 pF |
| Max Propagation Delay | 8 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 6 |
| Number of Inputs | 1 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package Length | 0.154 in |
| Package Name | 14-SOIC |
| Package Width | 3.9 mm |
| Qualification | AEC-Q100 |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 4.5 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
CMOS Power Consumption and CPD Calculation (Rev. B)
Automotive Logic Devices Brochure
Little Logic Guide 2018 (Rev. G)
Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)
Texas Instruments Little Logic Application Report
TI IBIS File Creation, Validation, and Distribution Processes
LOGIC Pocket Data Book (Rev. B)
How to Select Little Logic (Rev. A)
SN74AHCT14Q-Q1 Automotive Hex Schmitt-Trigger Inverter datasheet (Rev. D)
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Design Summary for WCSP Little Logic (Rev. B)
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Selecting the Right Level Translation Solution (Rev. A)
AHC/AHCT Designer's Guide February 2000 (Rev. D)
Live Insertion
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Logic Guide (Rev. AB)
Implications of Slow or Floating CMOS Inputs (Rev. E)
Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)
