ADS54J69IRMP
ActiveANALOG TO DIGITAL CONVERTERS - ADC DUAL-CHANNEL 16-BIT 500-MSPS ANALOG-TO A 595-ADS54J69IRMPT
ADS54J69IRMP
ActiveANALOG TO DIGITAL CONVERTERS - ADC DUAL-CHANNEL 16-BIT 500-MSPS ANALOG-TO A 595-ADS54J69IRMPT
Description
General part information
ADS54J69 Series
The ADS54J69 is a low-power, wide-bandwidth, 16-bit, 500-MSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –159 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 10.0 Gbps, supporting one or two lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each ADC channel is directly connected to a wideband digital down-converter (DDC) block. The ADS54J69 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.
The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 16-bit data from each channel.
The ADS54J69 is a low-power, wide-bandwidth, 16-bit, 500-MSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –159 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 10.0 Gbps, supporting one or two lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each ADC channel is directly connected to a wideband digital down-converter (DDC) block. The ADS54J69 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS54J69IRMP |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | JESD204B |
| Features | Simultaneous Sampling, Interleavable |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 2 count |
| Number of Bits | 16 bits |
| Number of Inputs | 2 |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 72-VFQFN Exposed Pad |
| Package Length | 10 mm |
| Package Name | 72-VQFN |
| Package Width | 10 mm |
| Ratio - ADC | 1 |
| Ratio - S/H | 1 |
| Reference Type | External |
| Sampling Rate (Per Second) | 500 MHz |
| Voltage - Supply, Analog (Range 1 Max) | 2 V |
| Voltage - Supply, Analog (Range 1 Min) | 1.8 V |
| Voltage - Supply, Analog (Range 2 Max) | 3.6 V |
| Voltage - Supply, Analog (Range 2 Min) | 2.85 V |
| Voltage - Supply, Digital (Max) | 2 V |
| Voltage - Supply, Digital (Min) | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Sign in to see pricing
Create a free account to access distributor pricing data.
CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
