CD54HC4046AF
ActiveTexas Instruments
HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO
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CD54HC4046AF
ActiveTexas Instruments
HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO
Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | CD54HC4046AF | CD54HC4046A Series |
|---|---|---|
| Differential - Input:Output [custom] | False | False |
| Differential - Input:Output [custom] | False | False |
| Divider/Multiplier [custom] | False | False |
| Divider/Multiplier [custom] | False | False |
| Frequency - Max [Max] | 38 MHz | 38 MHz |
| Input | CMOS | CMOS |
| Mounting Type | Through Hole | Through Hole |
| Number of Circuits | 1 | 1 |
| Operating Temperature [Max] | 125 °C | 125 °C |
| Operating Temperature [Min] | -55 C | -55 C |
| Output | CMOS | CMOS |
| Package / Case | 16-CDIP (0.300", 7.62mm) | 16-CDIP (0.300", 7.62mm) |
| PLL | True | True |
| Ratio - Input:Output [custom] | 4 | 4 |
| Ratio - Input:Output [custom] | 1 | 1 |
| Supplier Device Package | 16-CDIP | 16-CDIP |
| Type | Phase Lock Loop (PLL) | Phase Lock Loop (PLL) |
| Voltage - Supply [Max] | 6 V | 6 V |
| Voltage - Supply [Min] | 2 V | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
CD54HC4046A Series
High Speed CMOS Logic Phase-Locked-Loop with VCO
| Part | Mounting Type | Supplier Device Package | Operating Temperature [Min] | Operating Temperature [Max] | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Package / Case | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Voltage - Supply [Min] | Voltage - Supply [Max] | Type | PLL | Output | Divider/Multiplier [custom] | Divider/Multiplier [custom] | Frequency - Max [Max] | Number of Circuits | Input |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD54HC4046AFThe ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.
The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.
The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.
The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.
The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. | Through Hole | 16-CDIP | -55 C | 125 °C | 4 | 1 | 16-CDIP (0.300", 7.62mm) | 2 V | 6 V | Phase Lock Loop (PLL) | CMOS | 38 MHz | 1 | CMOS | |||||
Texas Instruments CD54HC4046AF3AThe ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.
The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.
The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.
The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.
The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. | Through Hole | 16-CDIP | -55 C | 125 °C | 4 | 1 | 16-CDIP (0.300", 7.62mm) | 2 V | 6 V | Phase Lock Loop (PLL) | CMOS | 38 MHz | 1 | CMOS |
Description
General part information
CD54HC4046A Series
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.
The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.
The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
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