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CDCM7005ZVA

CDCM7005ZVA

Obsolete
Texas Instruments

IC CLOCK SYNCHRONIZER 64BGA

CDCM7005ZVA

CDCM7005ZVA

Obsolete
Texas Instruments

IC CLOCK SYNCHRONIZER 64BGA

Description

General part information

CDCM7005 Series

The CDCM7005-SP is a high-performance, low phase noise and low skew clock synchronizer that synchronizes a VCXO (voltage controlled crystal oscillator) or VCO (voltage controlled oscillator) frequency to one of the two reference clocks. The programmable pre-divider M and the feedback-dividers N and P give a high flexibility to the frequency ratio of the reference clock to VC(X)O as VC(X)O_IN / PRI_REF = (N × P) / M or VC(X)O_IN / SEC_REF = (N × P) / M.

VC(X)O_IN clock operates up to 2 GHz. Through the selection of external VC(X)O and loop filter components, the PLL loop bandwidth and damping factor can be adjust to meet different system requirements.

The CDCM7005-SP can lock to one of two reference clock inputs (PRI_REF and SEC_REF), supports frequency hold-over mode and fast-frequency-locking for fail-safe and increased system redundancy. The outputs of the CDCM7005-SP are user definable and can be any combination of up to five LVPECL outputs or up to 10 LVCMOS outputs. The LVCMOS outputs are arranged in pairs (Y0A:Y0B, Y1A:Y1B, Ω), so that each pair has the same frequency. But each output can be separately inverted and disabled. The built in synchronization latches ensure that all outputs are synchronized for low output skew.

Technical Specifications

Parameters and characteristics for this part

SpecificationCDCM7005ZVA
Differential InputYes
Differential OutputYes
DividerYes
Frequency - Max1.5 GHz
InputLVCMOS, LVPECL
Input Ratio3
Mounting TypeSurface Mount
MultiplierNo
Number of Circuits1
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
OutputLVPECL, LVCMOS
Output Ratio10
Package / Case64-LFBGA
Package Length8 mm
Package Name64-BGA
Package Width8 mm
PLLYes with Bypass
TypeClock Synchronizer and Jitter Cleaner
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)3 V

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