M95512-DRMN3TP/K
ActiveAUTOMOTIVE 512 KBIT SPI BUS EEPROM WITH HIGH SPEED CLOCK
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M95512-DRMN3TP/K
ActiveAUTOMOTIVE 512 KBIT SPI BUS EEPROM WITH HIGH SPEED CLOCK
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | M95512-DRMN3TP/K |
|---|---|
| Clock Frequency | 16 MHz |
| Grade | Automotive |
| Memory Format | EEPROM |
| Memory Interface | SPI |
| Memory Organization | 64K x 8 |
| Memory Size | 64 kb |
| Memory Type | Non-Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Qualification | AEC-Q100 |
| Supplier Device Package | 8-SOIC |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.8 V |
| Write Cycle Time - Word, Page | 4 ms |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.96 | |
| 10 | $ 1.79 | |||
| 25 | $ 1.74 | |||
| 50 | $ 1.73 | |||
| 100 | $ 1.55 | |||
| 250 | $ 1.54 | |||
| 500 | $ 1.52 | |||
| 1000 | $ 1.45 | |||
| Digi-Reel® | 1 | $ 1.96 | ||
| 10 | $ 1.79 | |||
| 25 | $ 1.74 | |||
| 50 | $ 1.73 | |||
| 100 | $ 1.55 | |||
| 250 | $ 1.54 | |||
| 500 | $ 1.52 | |||
| 1000 | $ 1.45 | |||
| Tape & Reel (TR) | 2500 | $ 1.40 | ||
| 5000 | $ 1.35 | |||
Description
General part information
M95512-A125 Series
The M95512-A125 and M95512-A145 are 512-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0.
The devices are accessed by a simple serial SPI compatible interface running up to 16 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95512-A125 and M95512-A145 are byte-alterable memories (65536 × 8 bits) organized as 512 pages of 128 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.