CDCDLP223PWRG4
ActiveIC SS CLOCK DRIVER 20TSSOP
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CDCDLP223PWRG4
ActiveIC SS CLOCK DRIVER 20TSSOP
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Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | CDCDLP223PWRG4 | CDCDLP223 Series |
|---|---|---|
| Differential - Input:Output | No/Yes | No/Yes |
| Divider/Multiplier [custom] | False | False |
| Divider/Multiplier [custom] | False | False |
| Frequency - Max [Max] | 400 MHz | 400 MHz |
| Input | Crystal | Crystal |
| Mounting Type | Surface Mount | Surface Mount |
| Number of Circuits | 1 | 1 |
| Operating Temperature [Max] | 85 °C | 85 °C |
| Operating Temperature [Min] | -40 °C | -40 °C |
| Output | LVTTL | LVTTL |
| Package / Case | 0.173 in | 0.173 in |
| Package / Case | 4.4 mm | 4.4 mm |
| Package / Case | 20-TSSOP | 20-TSSOP |
| PLL | Yes with Bypass | Yes with Bypass |
| Ratio - Input:Output [custom] | 1 | 1 |
| Ratio - Input:Output [custom] | 3 | 3 |
| Supplier Device Package | 20-TSSOP | 20-TSSOP |
| Type | Spread Spectrum Clock Driver | Spread Spectrum Clock Driver |
| Voltage - Supply [Max] | 3.6 V | 3.6 V |
| Voltage - Supply [Min] | 3 V | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
CDCDLP223 Series
3.3-V clock synthesizer for DLP systems
| Part | Output | Differential - Input:Output | Number of Circuits | Input | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Operating Temperature [Min] | Operating Temperature [Max] | Frequency - Max [Max] | Type | Package / Case | Package / Case | Package / Case | Voltage - Supply [Max] | Voltage - Supply [Min] | PLL | Supplier Device Package | Mounting Type | Divider/Multiplier [custom] | Divider/Multiplier [custom] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCDLP223PW | LVTTL | No/Yes | 1 | Crystal | 1 | 3 | -40 °C | 85 °C | 400 MHz | Spread Spectrum Clock Driver | 0.173 in | 4.4 mm | 20-TSSOP | 3.6 V | 3 V | Yes with Bypass | 20-TSSOP | Surface Mount | ||
Texas Instruments CDCDLP223PWRG4 | LVTTL | No/Yes | 1 | Crystal | 1 | 3 | -40 °C | 85 °C | 400 MHz | Spread Spectrum Clock Driver | 0.173 in | 4.4 mm | 20-TSSOP | 3.6 V | 3 V | Yes with Bypass | 20-TSSOP | Surface Mount | ||
Texas Instruments CDCDLP223PWG4 | LVTTL | No/Yes | 1 | Crystal | 1 | 3 | -40 °C | 85 °C | 400 MHz | Spread Spectrum Clock Driver | 0.173 in | 4.4 mm | 20-TSSOP | 3.6 V | 3 V | Yes with Bypass | 20-TSSOP | Surface Mount |
Description
General part information
CDCDLP223 Series
The CDCDLP223 is a PLL-based high performance clock synthesizer that is optimized for use in DLP™ systems. It uses a 20 MHz crystal to generate the fundamental frequency and derives the frequencies for the 100 MHz HCLK and the 300 MHz HCLK output. Further, the CDCDLP223 generates a buffered copy of the 20 MHz Crystal Oscillator Frequency at the 20 MHz output terminal.
The 100 MHz HCLK output provides the reference clock for the XDR Clock Generator (CDCD5704). Spread-spectrum clocking with 0.5% down spread, which reduces Electro Magnetic Interference (EMI), is applied in the default configuration. The spread-spectrum clocking (SSC) is turned on and off via the serial control interface.
The 300 MHz HCLK output provides a 200-400 MHz clock signal for the DMD Control Logic of the DLP™ Control ASIC. Frequency selection in 20 MHz steps is possible via the serial control interface. Spread-spectrum clocking with ±1.0% or ±1.5% center spread is applied, which can be disabled via the serial control interface
Documents
Technical documentation and resources
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