
SN65HVD11QDR
ActiveIC TRANSCEIVER HALF 1/1 8SOIC
Deep-Dive with AI
Search across all available documentation for this part.

SN65HVD11QDR
ActiveIC TRANSCEIVER HALF 1/1 8SOIC
Deep-Dive with AI
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
Digikey | Cut Tape (CT) | 1 | $ 2.73 | |
10 | $ 2.45 | |||
25 | $ 2.32 | |||
100 | $ 2.01 | |||
250 | $ 1.91 | |||
500 | $ 1.81 | |||
Digi-Reel® | 1 | $ 2.73 | ||
10 | $ 2.45 | |||
25 | $ 2.32 | |||
100 | $ 2.01 | |||
250 | $ 1.91 | |||
500 | $ 1.81 | |||
Tape & Reel (TR) | 2500 | $ 1.81 | ||
Texas Instruments | LARGE T&R | 1 | $ 2.31 | |
100 | $ 2.02 | |||
250 | $ 1.42 | |||
1000 | $ 1.14 |
Description
General part information
65HVD11 Series
The SN65HVD11-HT device combines a 3-state differential line driver and differential input line receiver that operates with a single 3.3-V power supply. It is designed for balanced transmission lines and meets or exceeds ANSI TIA/EIA-485-A and ISO 8482:1993, with the exception that the thermal shutdown is removed. This differential bus transceiver is a monolithic integrated circuit designed for bidirectional data communication on multipoint bus-transmission lines. The driver and receiver have active-high and active-low enables, respectively, that can be externally connected together to function as direction control.
The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus when the driver is disabled or VCC= 0.
The SN65HVD11-HT device combines a 3-state differential line driver and differential input line receiver that operates with a single 3.3-V power supply. It is designed for balanced transmission lines and meets or exceeds ANSI TIA/EIA-485-A and ISO 8482:1993, with the exception that the thermal shutdown is removed. This differential bus transceiver is a monolithic integrated circuit designed for bidirectional data communication on multipoint bus-transmission lines. The driver and receiver have active-high and active-low enables, respectively, that can be externally connected together to function as direction control.